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authorEvan Cheng <evan.cheng@apple.com>2009-01-19 19:06:11 +0000
committerEvan Cheng <evan.cheng@apple.com>2009-01-19 19:06:11 +0000
commit44cc554311f9d068e474bf7bd05d849059308782 (patch)
treea939a93eda8aa606f62c7782a325fd81cf6e3d8a /llvm/lib/Target
parent0346c04f391502bb7ca093a22a6c057cf9b9249d (diff)
downloadbcm5719-llvm-44cc554311f9d068e474bf7bd05d849059308782.tar.gz
bcm5719-llvm-44cc554311f9d068e474bf7bd05d849059308782.zip
DIVREM isel deficiency: If sign bit is known zero, zero out DX/EDX/RDX instead of sign extending the low part (in AX/EAX/RAX) into it.
llvm-svn: 62519
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86ISelDAGToDAG.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
index 842bb13ae82..9b42d00b654 100644
--- a/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
@@ -1405,7 +1405,7 @@ SDNode *X86DAGToDAGISel::Select(SDValue N) {
InFlag =
CurDAG->getCopyToReg(CurDAG->getEntryNode(),
LoReg, N0, SDValue()).getValue(1);
- if (isSigned) {
+ if (isSigned && !CurDAG->SignBitIsZero(N0)) {
// Sign extend the low part into the high part.
InFlag =
SDValue(CurDAG->getTargetNode(SExtOpcode, MVT::Flag, InFlag), 0);
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