diff options
| author | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-29 14:02:34 +0000 |
|---|---|---|
| committer | Rafael Espindola <rafael.espindola@gmail.com> | 2010-06-29 14:02:34 +0000 |
| commit | 38a7d7cbc308c6a3f77eac646155ebfa869467ef (patch) | |
| tree | fce9a15fbc3660096672336bbe42dbdafa71004b /llvm/lib/Target | |
| parent | d34bb4e9b0467152bb39eb59cbcb668341b02b0d (diff) | |
| download | bcm5719-llvm-38a7d7cbc308c6a3f77eac646155ebfa869467ef.tar.gz bcm5719-llvm-38a7d7cbc308c6a3f77eac646155ebfa869467ef.zip | |
Add a VT argument to getMinimalPhysRegClass and replace the copy related uses
of getPhysicalRegisterRegClass with it.
If we want to make a copy (or estimate its cost), it is better to use the
smallest class as more efficient operations might be possible.
llvm-svn: 107140
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Target/TargetRegisterInfo.cpp | 5 |
2 files changed, 8 insertions, 2 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp index c0d05091be5..8b4d701fc71 100644 --- a/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp @@ -707,6 +707,11 @@ ARMBaseInstrInfo::copyRegToReg(MachineBasicBlock &MBB, if (SrcRC == ARM::tGPRRegisterClass || SrcRC == ARM::tcGPRRegisterClass) SrcRC = ARM::GPRRegisterClass; + if (DestRC == ARM::SPR_8RegisterClass) + DestRC = ARM::SPRRegisterClass; + if (SrcRC == ARM::SPR_8RegisterClass) + SrcRC = ARM::SPRRegisterClass; + // Allow DPR / DPR_VFP2 / DPR_8 cross-class copies. if (DestRC == ARM::DPR_8RegisterClass) DestRC = ARM::DPR_VFP2RegisterClass; diff --git a/llvm/lib/Target/TargetRegisterInfo.cpp b/llvm/lib/Target/TargetRegisterInfo.cpp index 32299f6c7e0..48374d93d88 100644 --- a/llvm/lib/Target/TargetRegisterInfo.cpp +++ b/llvm/lib/Target/TargetRegisterInfo.cpp @@ -63,7 +63,7 @@ TargetRegisterInfo::getPhysicalRegisterRegClass(unsigned reg, EVT VT) const { /// getMinimalPhysRegClass - Returns the Register Class of a physical /// register of the given type. const TargetRegisterClass * -TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg) const { +TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg, EVT VT) const { assert(isPhysicalRegister(reg) && "reg must be a physical register"); // Pick the most sub register class of the right type that contains @@ -71,7 +71,8 @@ TargetRegisterInfo::getMinimalPhysRegClass(unsigned reg) const { const TargetRegisterClass* BestRC = 0; for (regclass_iterator I = regclass_begin(), E = regclass_end(); I != E; ++I){ const TargetRegisterClass* RC = *I; - if (RC->contains(reg) && (!BestRC || BestRC->hasSubClass(RC))) + if ((VT == MVT::Other || RC->hasType(VT)) && RC->contains(reg) && + (!BestRC || BestRC->hasSubClass(RC))) BestRC = RC; } |

