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authorBob Wilson <bob.wilson@apple.com>2010-12-23 22:45:49 +0000
committerBob Wilson <bob.wilson@apple.com>2010-12-23 22:45:49 +0000
commit36be00ceb3c5cbb8fee4368fe424abbc4eaa4bf9 (patch)
treef0d6dbd947e5bf3a027413c20e596cdc1d38433c /llvm/lib/Target
parent27b4c16fefde48966b65f878799e9a7792275675 (diff)
downloadbcm5719-llvm-36be00ceb3c5cbb8fee4368fe424abbc4eaa4bf9.tar.gz
bcm5719-llvm-36be00ceb3c5cbb8fee4368fe424abbc4eaa4bf9.zip
Radar 8803471: Fix expansion of ARM BCCi64 pseudo instructions.
If the basic block containing the BCCi64 (or BCCZi64) instruction ends with an unconditional branch, that branch needs to be deleted before appending the expansion of the BCCi64 to the end of the block. llvm-svn: 122521
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp3
1 files changed, 3 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index d4f146232ea..22b3b431deb 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -4433,6 +4433,9 @@ ARMTargetLowering::EmitInstrWithCustomInserter(MachineInstr *MI,
case ARM::BCCi64:
case ARM::BCCZi64: {
+ // If there is an unconditional branch to the other successor, remove it.
+ BB->erase(llvm::next(MachineBasicBlock::iterator(MI)), BB->end());
+
// Compare both parts that make up the double comparison separately for
// equality.
bool RHSisZero = MI->getOpcode() == ARM::BCCZi64;
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