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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-12-10 12:43:53 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2017-12-10 12:43:53 +0000 |
| commit | 320996576d74e5839f9d4b46237bc00912efa67d (patch) | |
| tree | 419087e09aa73d798517622a36706c2fa39e38bc /llvm/lib/Target | |
| parent | 8547645948042d5ce4c3ce0a81c9db5eab3564e6 (diff) | |
| download | bcm5719-llvm-320996576d74e5839f9d4b46237bc00912efa67d.tar.gz bcm5719-llvm-320996576d74e5839f9d4b46237bc00912efa67d.zip | |
[X86] Flag ZNVER1 scheduler model as complete
We just have to locally tag COPY as WriteMove
llvm-svn: 320304
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ScheduleZnver1.td | 9 |
1 files changed, 3 insertions, 6 deletions
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td index 2bae818cfcd..872577787ac 100644 --- a/llvm/lib/Target/X86/X86ScheduleZnver1.td +++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td @@ -21,12 +21,6 @@ def Znver1Model : SchedMachineModel { let MispredictPenalty = 17; let HighLatency = 25; let PostRAScheduler = 1; - - // FIXME: This variable is required for incomplete model. - // We haven't catered all instructions. - // So, we reset the value of this variable so as to - // say that the model is incomplete. - let CompleteModel = 0; } let SchedModel = Znver1Model in { @@ -140,6 +134,9 @@ defm : ZnWriteResPair<WriteALU, ZnALU, 1>; defm : ZnWriteResPair<WriteShift, ZnALU, 1>; defm : ZnWriteResPair<WriteJump, ZnALU, 1>; +// Treat misc copies as a move. +def : InstRW<[WriteMove], (instrs COPY)>; + // IDIV def : WriteRes<WriteIDiv, [ZnALU2, ZnDivider]> { let Latency = 41; |

