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| author | Vikram S. Adve <vadve@cs.uiuc.edu> | 2002-04-01 20:28:48 +0000 |
|---|---|---|
| committer | Vikram S. Adve <vadve@cs.uiuc.edu> | 2002-04-01 20:28:48 +0000 |
| commit | 313ca141247cbfb36aef71bfdb83a037dd32e1c0 (patch) | |
| tree | 380e7c5e855ea398103679105a61ca0c22f35c51 /llvm/lib/Target | |
| parent | 8c61bc08596a261318e7f91bae99589b68623064 (diff) | |
| download | bcm5719-llvm-313ca141247cbfb36aef71bfdb83a037dd32e1c0.tar.gz bcm5719-llvm-313ca141247cbfb36aef71bfdb83a037dd32e1c0.zip | |
Case numbers were not updated when Sparc.burg.in was changed
to add separate label for bitwise NOT operator.
llvm-svn: 2091
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/Sparc/SparcInstrSelection.cpp | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp index 94b1ebcc5ab..18b4a0a4278 100644 --- a/llvm/lib/Target/Sparc/SparcInstrSelection.cpp +++ b/llvm/lib/Target/Sparc/SparcInstrSelection.cpp @@ -1327,6 +1327,7 @@ ThisIsAChainRule(int eruleno) case 242: case 243: case 244: + case 321: return true; break; default: @@ -1578,7 +1579,7 @@ GetInstructionsByRule(InstructionNode* subtreeRoot, break; case 21: // bool: Not(bool): Both these are implemented as: - case 321: // reg: BNot(reg) : reg = reg XOR-NOT 0 + case 421: // reg: BNot(reg) : reg = reg XOR-NOT 0 M = new MachineInstr(XNOR); M->SetMachineOperandVal(0, MachineOperand::MO_VirtualRegister, subtreeRoot->leftChild()->getValue()); |
