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authorBradley Smith <bradley.smith@arm.com>2015-01-19 16:37:17 +0000
committerBradley Smith <bradley.smith@arm.com>2015-01-19 16:37:17 +0000
commit3131e85eddb1026a9267d2998c7d5dda74e81923 (patch)
treefb6c5d0653c62c50cd8825fae38e957fd90ceb24 /llvm/lib/Target
parent30057b245e274b05429f1e1e82542bc2a3be6bb3 (diff)
downloadbcm5719-llvm-3131e85eddb1026a9267d2998c7d5dda74e81923.tar.gz
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[ARM] SSAT/USAT with an 'asr #32' shift should result in an undefined encoding rather than unpredictable
llvm-svn: 226469
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
index 51faf692c88..4d5122a7620 100644
--- a/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
+++ b/llvm/lib/Target/ARM/Disassembler/ARMDisassembler.cpp
@@ -4971,7 +4971,7 @@ static DecodeStatus DecodeT2ShifterImmOperand(MCInst &Inst, uint32_t Val,
DecodeStatus S = MCDisassembler::Success;
// Shift of "asr #32" is not allowed in Thumb2 mode.
- if (Val == 0x20) S = MCDisassembler::SoftFail;
+ if (Val == 0x20) S = MCDisassembler::Fail;
Inst.addOperand(MCOperand::CreateImm(Val));
return S;
}
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