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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-03-30 22:28:52 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-03-30 22:28:52 +0000 |
| commit | 2fe4fbc1843019d804b33117bc006a2a8ba89f6a (patch) | |
| tree | 96e2c438ebb265aff8c5f079284c586c29732511 /llvm/lib/Target | |
| parent | 5cd4f8f89fabe411445bb11c21add4fa7308e74b (diff) | |
| download | bcm5719-llvm-2fe4fbc1843019d804b33117bc006a2a8ba89f6a.tar.gz bcm5719-llvm-2fe4fbc1843019d804b33117bc006a2a8ba89f6a.zip | |
AMDGPU: Add frexp_exp intrinsic
llvm-svn: 264944
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIInstructions.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td index 2f7f908e4a5..bc0afa0a81c 100644 --- a/llvm/lib/Target/AMDGPU/SIInstructions.td +++ b/llvm/lib/Target/AMDGPU/SIInstructions.td @@ -1344,7 +1344,7 @@ defm V_FFBH_U32 : VOP1Inst <vop1<0x39, 0x2d>, "v_ffbh_u32", VOP_I32_I32>; defm V_FFBL_B32 : VOP1Inst <vop1<0x3a, 0x2e>, "v_ffbl_b32", VOP_I32_I32>; defm V_FFBH_I32 : VOP1Inst <vop1<0x3b, 0x2f>, "v_ffbh_i32", VOP_I32_I32>; defm V_FREXP_EXP_I32_F64 : VOP1Inst <vop1<0x3c,0x30>, "v_frexp_exp_i32_f64", - VOP_I32_F64 + VOP_I32_F64, int_amdgcn_frexp_exp >; let SchedRW = [WriteDoubleAdd] in { @@ -1359,7 +1359,7 @@ defm V_FRACT_F64 : VOP1Inst <vop1<0x3e, 0x32>, "v_fract_f64", defm V_FREXP_EXP_I32_F32 : VOP1Inst <vop1<0x3f, 0x33>, "v_frexp_exp_i32_f32", - VOP_I32_F32 + VOP_I32_F32, int_amdgcn_frexp_exp >; defm V_FREXP_MANT_F32 : VOP1Inst <vop1<0x40, 0x34>, "v_frexp_mant_f32", VOP_F32_F32, int_amdgcn_frexp_mant |
