[X86] Introduce WriteFLDC for x87 constant loads.

Summary:
{FLDL2E, FLDL2T, FLDLG2, FLDLN2, FLDPI} were using WriteMicrocoded.

 - I've measured the values for Broadwell, Haswell, SandyBridge, Skylake.
 - For ZnVer1 and Atom, values were transferred form InstRWs.
 - For SLM and BtVer2, I've guessed some values :(

Reviewers: RKSimon, craig.topper, andreadb

Subscribers: gbedwell, llvm-commits

Differential Revision: https://reviews.llvm.org/D47585

llvm-svn: 333656

11 files changed, 18 insertions, 10 deletions

diff --git a/llvm/lib/Target/X86/X86InstrFPStack.td b/llvm/lib/Target/X86/X86InstrFPStack.td
index bbfe7b2a316..cc81a919ec9 100644
--- a/llvm/lib/Target/X86/X86InstrFPStack.td
+++ b/llvm/lib/Target/X86/X86InstrFPStack.td
@@ -570,6 +570,14 @@ def LD_F0 : FPI<0xD9, MRM_EE, (outs), (ins), "fldz">;
 let SchedRW = [WriteFLD1] in
 def LD_F1 : FPI<0xD9, MRM_E8, (outs), (ins), "fld1">;
 
+let SchedRW = [WriteFLDC], Defs = [FPSW] in {
+def FLDL2T : I<0xD9, MRM_E9, (outs), (ins), "fldl2t", []>;
+def FLDL2E : I<0xD9, MRM_EA, (outs), (ins), "fldl2e", []>;
+def FLDPI : I<0xD9, MRM_EB, (outs), (ins), "fldpi", []>;
+def FLDLG2 : I<0xD9, MRM_EC, (outs), (ins), "fldlg2", []>;
+def FLDLN2 : I<0xD9, MRM_ED, (outs), (ins), "fldln2", []>;
+} // SchedRW
+
 // Floating point compares.
 let SchedRW = [WriteFCom] in {
 def UCOM_Fpr32 : FpIf32<(outs), (ins RFP32:$lhs, RFP32:$rhs), CompareFP,
@@ -649,11 +657,6 @@ let SchedRW = [WriteMicrocoded] in {
 let Defs = [FPSW] in {
 def WAIT : I<0x9B, RawFrm, (outs), (ins), "wait", []>;
 def FXAM : I<0xD9, MRM_E5, (outs), (ins), "fxam", []>;
-def FLDL2T : I<0xD9, MRM_E9, (outs), (ins), "fldl2t", []>;
-def FLDL2E : I<0xD9, MRM_EA, (outs), (ins), "fldl2e", []>;
-def FLDPI : I<0xD9, MRM_EB, (outs), (ins), "fldpi", []>;
-def FLDLG2 : I<0xD9, MRM_EC, (outs), (ins), "fldlg2", []>;
-def FLDLN2 : I<0xD9, MRM_ED, (outs), (ins), "fldln2", []>;
 def F2XM1 : I<0xD9, MRM_F0, (outs), (ins), "f2xm1", []>;
 def FYL2X : I<0xD9, MRM_F1, (outs), (ins), "fyl2x", []>;
 def FPTAN : I<0xD9, MRM_F2, (outs), (ins), "fptan", []>;
diff --git a/llvm/lib/Target/X86/X86SchedBroadwell.td b/llvm/lib/Target/X86/X86SchedBroadwell.td
index f5acb74c098..1e5a6e3bb7d 100755
--- a/llvm/lib/Target/X86/X86SchedBroadwell.td
+++ b/llvm/lib/Target/X86/X86SchedBroadwell.td
@@ -168,6 +168,7 @@ defm : BWWriteResPair<WriteJump,  [BWPort06],   1>;
 // Floating point. This covers both scalar and vector operations.
 defm : X86WriteRes<WriteFLD0,          [BWPort01], 1, [1], 1>;
 defm : X86WriteRes<WriteFLD1,          [BWPort01], 1, [2], 2>;
+defm : X86WriteRes<WriteFLDC,          [BWPort01], 1, [2], 2>;
 defm : X86WriteRes<WriteFLoad,         [BWPort23], 5, [1], 1>;
 defm : X86WriteRes<WriteFLoadX,        [BWPort23], 5, [1], 1>;
 defm : X86WriteRes<WriteFLoadY,        [BWPort23], 6, [1], 1>;
diff --git a/llvm/lib/Target/X86/X86SchedHaswell.td b/llvm/lib/Target/X86/X86SchedHaswell.td
index 70706b623f3..7517f4c8246 100644
--- a/llvm/lib/Target/X86/X86SchedHaswell.td
+++ b/llvm/lib/Target/X86/X86SchedHaswell.td
@@ -158,6 +158,7 @@ defm : HWWriteResPair<WriteIDiv64, [HWPort0, HWDivider], 25, [1,10], 1, 4>;
 // Scalar and vector floating point.
 defm : X86WriteRes<WriteFLD0,          [HWPort01], 1, [1], 1>;
 defm : X86WriteRes<WriteFLD1,          [HWPort01], 1, [2], 2>;
+defm : X86WriteRes<WriteFLDC,          [HWPort01], 1, [2], 2>;
 defm : X86WriteRes<WriteFLoad,         [HWPort23], 5, [1], 1>;
 defm : X86WriteRes<WriteFLoadX,        [HWPort23], 6, [1], 1>;
 defm : X86WriteRes<WriteFLoadY,        [HWPort23], 7, [1], 1>;
@@ -659,9 +660,6 @@ def : InstRW<[HWWriteFBLD], (instregex "FBLDm")>;
 // r.
 def : InstRW<[HWWriteP01], (instregex "ST_(F|FP)rr")>;
 
-// FLDPI FLDL2E etc.
-def : InstRW<[HWWrite2P01], (instregex "FLDPI", "FLDL2(T|E)", "FLDL(G|N)2")>;
-
 // FFREE.
 def : InstRW<[HWWriteP01], (instregex "FFREE")>;
 
diff --git a/llvm/lib/Target/X86/X86SchedSandyBridge.td b/llvm/lib/Target/X86/X86SchedSandyBridge.td
index c13212d16b1..5387250f5af 100644
--- a/llvm/lib/Target/X86/X86SchedSandyBridge.td
+++ b/llvm/lib/Target/X86/X86SchedSandyBridge.td
@@ -150,6 +150,7 @@ defm : SBWriteResPair<WriteBZHI, [SBPort1], 1>;
 // Scalar and vector floating point.
 defm : X86WriteRes<WriteFLD0,          [SBPort5], 1, [1], 1>;
 defm : X86WriteRes<WriteFLD1,          [SBPort0,SBPort5], 1, [1,1], 2>;
+defm : X86WriteRes<WriteFLDC,          [SBPort0,SBPort1], 1, [1,1], 2>;
 defm : X86WriteRes<WriteFLoad,         [SBPort23], 5, [1], 1>;
 defm : X86WriteRes<WriteFLoadX,        [SBPort23], 6, [1], 1>;
 defm : X86WriteRes<WriteFLoadY,        [SBPort23], 7, [1], 1>;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
index 64c0b79c2da..16ce18d9714 100644
--- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td
@@ -163,6 +163,7 @@ defm : SKLWriteResPair<WriteJump,  [SKLPort06],   1>;
 // Floating point. This covers both scalar and vector operations.
 defm : X86WriteRes<WriteFLD0,          [SKLPort05], 1, [1], 1>;
 defm : X86WriteRes<WriteFLD1,          [SKLPort05], 1, [2], 2>;
+defm : X86WriteRes<WriteFLDC,          [SKLPort05], 1, [2], 2>;
 defm : X86WriteRes<WriteFLoad,         [SKLPort23], 5, [1], 1>;
 defm : X86WriteRes<WriteFLoadX,        [SKLPort23], 6, [1], 1>;
 defm : X86WriteRes<WriteFLoadY,        [SKLPort23], 7, [1], 1>;
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeServer.td b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
index 88376a4285b..8ee58e78109 100755
--- a/llvm/lib/Target/X86/X86SchedSkylakeServer.td
+++ b/llvm/lib/Target/X86/X86SchedSkylakeServer.td
@@ -163,6 +163,7 @@ defm : SKXWriteResPair<WriteJump,  [SKXPort06],   1>;
 // Floating point. This covers both scalar and vector operations.
 defm : X86WriteRes<WriteFLD0,          [SKXPort05], 1, [1], 1>;
 defm : X86WriteRes<WriteFLD1,          [SKXPort05], 1, [2], 2>;
+defm : X86WriteRes<WriteFLDC,          [SKXPort05], 1, [2], 2>;
 defm : X86WriteRes<WriteFLoad,         [SKXPort23], 5, [1], 1>;
 defm : X86WriteRes<WriteFLoadX,        [SKXPort23], 6, [1], 1>;
 defm : X86WriteRes<WriteFLoadY,        [SKXPort23], 7, [1], 1>;
diff --git a/llvm/lib/Target/X86/X86Schedule.td b/llvm/lib/Target/X86/X86Schedule.td
index ad316905044..ccee972c482 100644
--- a/llvm/lib/Target/X86/X86Schedule.td
+++ b/llvm/lib/Target/X86/X86Schedule.td
@@ -143,6 +143,7 @@ defm WriteJump : X86SchedWritePair;
 // Floating point. This covers both scalar and vector operations.
 def  WriteFLD0          : SchedWrite;
 def  WriteFLD1          : SchedWrite;
+def  WriteFLDC          : SchedWrite;
 def  WriteFLoad         : SchedWrite;
 def  WriteFLoadX        : SchedWrite;
 def  WriteFLoadY        : SchedWrite;
diff --git a/llvm/lib/Target/X86/X86ScheduleAtom.td b/llvm/lib/Target/X86/X86ScheduleAtom.td
index ecdd60deff5..2eee8520c5a 100644
--- a/llvm/lib/Target/X86/X86ScheduleAtom.td
+++ b/llvm/lib/Target/X86/X86ScheduleAtom.td
@@ -605,7 +605,7 @@ def AtomWrite01_10 : SchedWriteRes<[AtomPort01]> {
   let Latency = 10;
   let ResourceCycles = [10];
 }
-def : InstRW<[AtomWrite01_10], (instrs FLDL2E, FLDL2T, FLDLG2, FLDLN2, FLDPI)>;
+def : SchedAlias<WriteFLDC, AtomWrite01_10>;
 def : InstRW<[AtomWrite01_10], (instregex "(U)?COMIS(D|S)rm",
                                           "CVT(T)?SS2SI64rm(_Int)?")>;
 
diff --git a/llvm/lib/Target/X86/X86ScheduleBtVer2.td b/llvm/lib/Target/X86/X86ScheduleBtVer2.td
index 81a1fd0d491..764d097e369 100644
--- a/llvm/lib/Target/X86/X86ScheduleBtVer2.td
+++ b/llvm/lib/Target/X86/X86ScheduleBtVer2.td
@@ -273,6 +273,7 @@ def : WriteRes<WriteNop, [JALU01]> { let Latency = 1; }
 
 defm : X86WriteRes<WriteFLD0,          [JFPU1, JSTC], 3, [1,1], 1>;
 defm : X86WriteRes<WriteFLD1,          [JFPU1, JSTC], 3, [1,1], 1>;
+defm : X86WriteRes<WriteFLDC,          [JFPU1, JSTC], 3, [1,1], 1>;
 defm : X86WriteRes<WriteFLoad,         [JLAGU, JFPU01, JFPX], 5, [1, 1, 1], 1>;
 defm : X86WriteRes<WriteFLoadX,        [JLAGU, JFPU01, JFPX], 5, [1, 1, 1], 1>;
 defm : X86WriteRes<WriteFLoadY,        [JLAGU, JFPU01, JFPX], 5, [1, 1, 1], 1>;
diff --git a/llvm/lib/Target/X86/X86ScheduleSLM.td b/llvm/lib/Target/X86/X86ScheduleSLM.td
index 94bd6e93e6d..8fdf9c645c4 100644
--- a/llvm/lib/Target/X86/X86ScheduleSLM.td
+++ b/llvm/lib/Target/X86/X86ScheduleSLM.td
@@ -138,6 +138,7 @@ defm : SLMWriteResPair<WriteIDiv64, [SLM_IEC_RSV01, SLMDivider], 25, [1,25], 1,
 // Scalar and vector floating point.
 defm : X86WriteRes<WriteFLD0,       [SLM_FPC_RSV01], 1, [1], 1>;
 defm : X86WriteRes<WriteFLD1,       [SLM_FPC_RSV01], 1, [1], 1>;
+defm : X86WriteRes<WriteFLDC,       [SLM_FPC_RSV01], 1, [2], 2>;
 def  : WriteRes<WriteFLoad,         [SLM_MEC_RSV]> { let Latency = 3; }
 def  : WriteRes<WriteFLoadX,        [SLM_MEC_RSV]> { let Latency = 3; }
 def  : WriteRes<WriteFLoadY,        [SLM_MEC_RSV]> { let Latency = 3; }
diff --git a/llvm/lib/Target/X86/X86ScheduleZnver1.td b/llvm/lib/Target/X86/X86ScheduleZnver1.td
index b2bf66b7bec..4450bf6b114 100644
--- a/llvm/lib/Target/X86/X86ScheduleZnver1.td
+++ b/llvm/lib/Target/X86/X86ScheduleZnver1.td
@@ -821,7 +821,7 @@ def : SchedAlias<WriteFLD0, ZnWriteFPU13>;
 def : SchedAlias<WriteFLD1, ZnWriteFPU3>;
 
 // FLDPI FLDL2E etc.
-def : InstRW<[ZnWriteFPU3], (instregex "FLDPI", "FLDL2(T|E)", "FLDL(G|N)2")>;
+def : SchedAlias<WriteFLDC, ZnWriteFPU3>;
 
 // FNSTSW.
 // AX.