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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-15 21:22:52 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2014-06-15 21:22:52 +0000 |
| commit | 2a60de548aa83df8a33b8fdee02be2a6ab077337 (patch) | |
| tree | bf59eb2aca1c4c71cc598cca8951df4ca5938147 /llvm/lib/Target | |
| parent | f302c941d8c8e3e52b7bfea83b8706231f62f681 (diff) | |
| download | bcm5719-llvm-2a60de548aa83df8a33b8fdee02be2a6ab077337.tar.gz bcm5719-llvm-2a60de548aa83df8a33b8fdee02be2a6ab077337.zip | |
Fix copy paste error
llvm-svn: 211003
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/R600/AMDGPUISelLowering.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp index 86deae039fa..15ac2a2379d 100644 --- a/llvm/lib/Target/R600/AMDGPUISelLowering.cpp +++ b/llvm/lib/Target/R600/AMDGPUISelLowering.cpp @@ -354,7 +354,7 @@ MVT AMDGPUTargetLowering::getVectorIdxTy() const { // FIXME: Why are we reporting vectors of FP immediates as legal? bool AMDGPUTargetLowering::isFPImmLegal(const APFloat &Imm, EVT VT) const { EVT ScalarVT = VT.getScalarType(); - return (ScalarVT == MVT::f32 || MVT::f64); + return (ScalarVT == MVT::f32 || ScalarVT == MVT::f64); } // We don't want to shrink f64 / f32 constants. |
