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| author | Daniel Jasper <djasper@google.com> | 2016-12-19 14:24:22 +0000 |
|---|---|---|
| committer | Daniel Jasper <djasper@google.com> | 2016-12-19 14:24:22 +0000 |
| commit | 24218d5993b92389f28b9105d8f9298a53a165d4 (patch) | |
| tree | f7c975f67bd9f802016f421a3674b8c38884043d /llvm/lib/Target | |
| parent | 3bae486b7f1e2036c6443dafcbc183190c982f59 (diff) | |
| download | bcm5719-llvm-24218d5993b92389f28b9105d8f9298a53a165d4.tar.gz bcm5719-llvm-24218d5993b92389f28b9105d8f9298a53a165d4.zip | |
Silence unused warning.
llvm-svn: 290109
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMInstructionSelector.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp index b17155a4791..2bdbe4fca3d 100644 --- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp +++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp @@ -43,6 +43,7 @@ static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII, assert(RegBank && "Can't get reg bank for virtual register"); const unsigned DstSize = MRI.getType(DstReg).getSizeInBits(); + (void)DstSize; unsigned SrcReg = I.getOperand(1).getReg(); const unsigned SrcSize = RBI.getSizeInBits(SrcReg, MRI, TRI); (void)SrcSize; |
