summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target
diff options
context:
space:
mode:
authorDiana Picus <diana.picus@linaro.org>2017-11-14 11:20:32 +0000
committerDiana Picus <diana.picus@linaro.org>2017-11-14 11:20:32 +0000
commit21a42bcc0be2e99fd17c3751e2488e1df9f3e636 (patch)
treecb6efebc387e2912f206a9079f68cda2f7be22c5 /llvm/lib/Target
parent5269875ef965e5aa377db32e5cf7fd9ae44f1fbe (diff)
downloadbcm5719-llvm-21a42bcc0be2e99fd17c3751e2488e1df9f3e636.tar.gz
bcm5719-llvm-21a42bcc0be2e99fd17c3751e2488e1df9f3e636.zip
[ARM GlobalISel] Remove C++ code for G_CONSTANT
Get rid of the handwritten instruction selector code for handling G_CONSTANT. This code wasn't checking all the preconditions correctly anyway, so it's better to leave it to TableGen, which can handle at least some cases correctly (e.g. MOVi, MOVi16, folding into binary operations). Also add tests to cover those cases. llvm-svn: 318146
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/ARMInstructionSelector.cpp22
1 files changed, 0 insertions, 22 deletions
diff --git a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
index aee3d850c02..dd11b1d5f8d 100644
--- a/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
+++ b/llvm/lib/Target/ARM/ARMInstructionSelector.cpp
@@ -796,28 +796,6 @@ bool ARMInstructionSelector::select(MachineInstr &I) const {
I.setDesc(TII.get(ARM::ADDri));
MIB.addImm(0).add(predOps(ARMCC::AL)).add(condCodeOp());
break;
- case G_CONSTANT: {
- unsigned Reg = I.getOperand(0).getReg();
-
- if (!validReg(MRI, Reg, 32, ARM::GPRRegBankID))
- return false;
-
- I.setDesc(TII.get(ARM::MOVi));
- MIB.add(predOps(ARMCC::AL)).add(condCodeOp());
-
- auto &Val = I.getOperand(1);
- if (Val.isCImm()) {
- if (Val.getCImm()->getBitWidth() > 32)
- return false;
- Val.ChangeToImmediate(Val.getCImm()->getZExtValue());
- }
-
- if (!Val.isImm()) {
- return false;
- }
-
- break;
- }
case G_GLOBAL_VALUE:
return selectGlobal(MIB, MRI);
case G_STORE:
OpenPOWER on IntegriCloud