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authorCraig Topper <craig.topper@intel.com>2017-11-14 16:14:00 +0000
committerCraig Topper <craig.topper@intel.com>2017-11-14 16:14:00 +0000
commit21531142276ac85ea431f18a462195ac6099b5f5 (patch)
tree88f1724d490cea1ed9f079edb14b281491407efe /llvm/lib/Target
parent174fdef45835260acb9ab8eb079e61efbd30ffae (diff)
downloadbcm5719-llvm-21531142276ac85ea431f18a462195ac6099b5f5.tar.gz
bcm5719-llvm-21531142276ac85ea431f18a462195ac6099b5f5.zip
[X86] Fix typo in comment. NFC
llvm-svn: 318156
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86InterleavedAccess.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InterleavedAccess.cpp b/llvm/lib/Target/X86/X86InterleavedAccess.cpp
index 6e87116f4d1..cdb24b9d40a 100644
--- a/llvm/lib/Target/X86/X86InterleavedAccess.cpp
+++ b/llvm/lib/Target/X86/X86InterleavedAccess.cpp
@@ -137,7 +137,7 @@ bool X86InterleavedAccessGroup::isSupported() const {
// 1. Store and load of 4-element vectors of 64 bits on AVX.
// 2. Store of 16/32-element vectors of 8 bits on AVX.
// Stride 3:
- // 1. Load of 16/32-element vecotrs of 8 bits on AVX.
+ // 1. Load of 16/32-element vectors of 8 bits on AVX.
if (!Subtarget.hasAVX() || (Factor != 4 && Factor != 3))
return false;
@@ -260,7 +260,7 @@ static void genShuffleBland(MVT VT, ArrayRef<uint32_t> Mask,
Out.push_back(Mask[i] + HighOffset + NumOfElm);
}
-// reorderSubVecotr returns the data to is the original state. And de-facto is
+// reorderSubVector returns the data to is the original state. And de-facto is
// the opposite of the function concatSubVector.
// For VecElems = 16
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