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| author | Amara Emerson <aemerson@apple.com> | 2018-04-25 14:43:59 +0000 |
|---|---|---|
| committer | Amara Emerson <aemerson@apple.com> | 2018-04-25 14:43:59 +0000 |
| commit | 1f5d9941192d9a5876c44d6c274b4447b9bf2099 (patch) | |
| tree | d51c3fbeebcf12ae28bac3830b1b93de376bdbf5 /llvm/lib/Target | |
| parent | f6e44a0bdffdbb32f458e11d1ddba163a93d38e5 (diff) | |
| download | bcm5719-llvm-1f5d9941192d9a5876c44d6c274b4447b9bf2099.tar.gz bcm5719-llvm-1f5d9941192d9a5876c44d6c274b4447b9bf2099.zip | |
[AArch64][GlobalISel] Implement selection for the llvm.trap intrinsic.
rdar://38674040
llvm-svn: 330831
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp index 309f6128e5b..4124302e8ab 100644 --- a/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstructionSelector.cpp @@ -1466,6 +1466,15 @@ bool AArch64InstructionSelector::select(MachineInstr &I, case TargetOpcode::G_VASTART: return STI.isTargetDarwin() ? selectVaStartDarwin(I, MF, MRI) : selectVaStartAAPCS(I, MF, MRI); + case TargetOpcode::G_INTRINSIC_W_SIDE_EFFECTS: + if (!I.getOperand(0).isIntrinsicID()) + return false; + if (I.getOperand(0).getIntrinsicID() != Intrinsic::trap) + return false; + BuildMI(MBB, I, I.getDebugLoc(), TII.get(AArch64::BRK)) + .addImm(1); + I.eraseFromParent(); + return true; case TargetOpcode::G_IMPLICIT_DEF: I.setDesc(TII.get(TargetOpcode::IMPLICIT_DEF)); const LLT DstTy = MRI.getType(I.getOperand(0).getReg()); |

