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| author | Evandro Menezes <e.menezes@samsung.com> | 2016-12-16 00:18:00 +0000 |
|---|---|---|
| committer | Evandro Menezes <e.menezes@samsung.com> | 2016-12-16 00:18:00 +0000 |
| commit | 1b48bac3300d440e6a2772f6feda40680d61729c (patch) | |
| tree | 7f9868cd01744bb7af9cc5bac789387f64c06971 /llvm/lib/Target | |
| parent | ff1302c1622ef08040c4b0f5a7c32da53e966804 (diff) | |
| download | bcm5719-llvm-1b48bac3300d440e6a2772f6feda40680d61729c.tar.gz bcm5719-llvm-1b48bac3300d440e6a2772f6feda40680d61729c.zip | |
[AArch64] Add FeatureSlowMisaligned128Store to Exynos M1 and M2
This feature now gates such stores after r289845. Thus the Exynos
processors now need this feature.
llvm-svn: 289898
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64.td | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 7c90695419f..c40391d5ad9 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -230,6 +230,7 @@ def ProcExynosM1 : SubtargetFeature<"exynosm1", "ARMProcFamily", "ExynosM1", FeatureNEON, FeaturePerfMon, FeaturePostRAScheduler, + FeatureSlowMisaligned128Store, FeatureUseRSqrt, FeatureZCZeroing]>; @@ -243,6 +244,7 @@ def ProcExynosM2 : SubtargetFeature<"exynosm2", "ARMProcFamily", "ExynosM1", FeatureNEON, FeaturePerfMon, FeaturePostRAScheduler, + FeatureSlowMisaligned128Store, FeatureZCZeroing]>; def ProcKryo : SubtargetFeature<"kryo", "ARMProcFamily", "Kryo", |
