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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-11-29 13:33:40 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-11-29 13:33:40 +0000 |
| commit | 1ac7177abbf81408e807dc29d135ce55b037b30c (patch) | |
| tree | d178472e6f85c4122d9ab476e5a50aed0ecf84e1 /llvm/lib/Target | |
| parent | e3291de2b83199761dae5e5456052d6f9cebe66d (diff) | |
| download | bcm5719-llvm-1ac7177abbf81408e807dc29d135ce55b037b30c.tar.gz bcm5719-llvm-1ac7177abbf81408e807dc29d135ce55b037b30c.zip | |
[AMDGPU][MC][GFX9] Corrected mapping of GFX9 v_add/sub/subrev_u32
When translating pseudo to MC, v_add/sub/subrev_u32 shall be mapped via a separate table as GFX8 has opcodes with the same names.
These instructions shall also be labelled as renamed for pseudoToMCOpcode to handle them correctly.
Reviewers: arsenm
Differential Revision: https://reviews.llvm.org/D40550
llvm-svn: 319311
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/VOP2Instructions.td | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/llvm/lib/Target/AMDGPU/VOP2Instructions.td b/llvm/lib/Target/AMDGPU/VOP2Instructions.td index f870f511ba4..ef90b68db1a 100644 --- a/llvm/lib/Target/AMDGPU/VOP2Instructions.td +++ b/llvm/lib/Target/AMDGPU/VOP2Instructions.td @@ -128,15 +128,20 @@ class getVOP2Pat64 <SDPatternOperator node, VOPProfile P> : LetDummies { multiclass VOP2Inst <string opName, VOPProfile P, SDPatternOperator node = null_frag, - string revOp = opName> { + string revOp = opName, + bit GFX9Renamed = 0> { - def _e32 : VOP2_Pseudo <opName, P>, - Commutable_REV<revOp#"_e32", !eq(revOp, opName)>; + let renamedInGFX9 = GFX9Renamed in { + + def _e32 : VOP2_Pseudo <opName, P>, + Commutable_REV<revOp#"_e32", !eq(revOp, opName)>; + + def _e64 : VOP3_Pseudo <opName, P, getVOP2Pat64<node, P>.ret>, + Commutable_REV<revOp#"_e64", !eq(revOp, opName)>; - def _e64 : VOP3_Pseudo <opName, P, getVOP2Pat64<node, P>.ret>, - Commutable_REV<revOp#"_e64", !eq(revOp, opName)>; + def _sdwa : VOP2_SDWA_Pseudo <opName, P>; - def _sdwa : VOP2_SDWA_Pseudo <opName, P>; + } } multiclass VOP2bInst <string opName, @@ -381,9 +386,9 @@ defm V_SUBBREV_U32 : VOP2bInst <"v_subbrev_u32", VOP2b_I32_I1_I32_I32_I1, null_f let SubtargetPredicate = HasAddNoCarryInsts in { -defm V_ADD_U32 : VOP2Inst <"v_add_u32", VOP_I32_I32_I32>; -defm V_SUB_U32 : VOP2Inst <"v_sub_u32", VOP_I32_I32_I32>; -defm V_SUBREV_U32 : VOP2Inst <"v_subrev_u32", VOP_I32_I32_I32, null_frag, "v_sub_u32">; +defm V_ADD_U32 : VOP2Inst <"v_add_u32", VOP_I32_I32_I32, null_frag, "v_add_u32", 1>; +defm V_SUB_U32 : VOP2Inst <"v_sub_u32", VOP_I32_I32_I32, null_frag, "v_sub_u32", 1>; +defm V_SUBREV_U32 : VOP2Inst <"v_subrev_u32", VOP_I32_I32_I32, null_frag, "v_sub_u32", 1>; } } // End isCommutable = 1 |
