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authorUlrich Weigand <ulrich.weigand@de.ibm.com>2013-06-24 11:01:55 +0000
committerUlrich Weigand <ulrich.weigand@de.ibm.com>2013-06-24 11:01:55 +0000
commit1847bb811e826fab3976cb960f812a2722c05989 (patch)
treee5882f1b4cba44e02804907faf3c242f9bf9a0b8 /llvm/lib/Target
parent0e8053af081af476ec5c2242ecb6ba2a4e4e7045 (diff)
downloadbcm5719-llvm-1847bb811e826fab3976cb960f812a2722c05989.tar.gz
bcm5719-llvm-1847bb811e826fab3976cb960f812a2722c05989.zip
[PowerPC] Support blrl and variants in the asm parser
This patch adds support for blrl and its conditional variants. The patterns are (currently) used for the asm parser only. llvm-svn: 184718
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/PowerPC/PPCInstrInfo.td13
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/PowerPC/PPCInstrInfo.td b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
index 4f006024d37..534327056b0 100644
--- a/llvm/lib/Target/PowerPC/PPCInstrInfo.td
+++ b/llvm/lib/Target/PowerPC/PPCInstrInfo.td
@@ -926,6 +926,14 @@ let isCall = 1, PPC970_Unit = 7, Defs = [LR] in {
def BCCTRL : XLForm_2_br<19, 528, 1, (outs), (ins pred:$cond),
"b${cond:cc}ctrl ${cond:reg}", BrB, []>;
}
+ let Uses = [LR, RM] in {
+ def BLRL : XLForm_2_ext<19, 16, 20, 0, 1, (outs), (ins),
+ "blrl", BrB, []>;
+
+ let isCodeGenOnly = 1 in
+ def BCLRL : XLForm_2_br<19, 16, 1, (outs), (ins pred:$cond),
+ "b${cond:cc}lrl ${cond:reg}", BrB, []>;
+ }
}
let isCall = 1, isTerminator = 1, isReturn = 1, isBarrier = 1, Uses = [RM] in
@@ -2183,6 +2191,11 @@ multiclass BranchExtendedMnemonic<string name, int bibo> {
def : InstAlias<"b"#name#"ctr",
(BCCTR bibo, CR0)>;
+ def : InstAlias<"b"#name#"lrl $cc",
+ (BCLRL bibo, crrc:$cc)>;
+ def : InstAlias<"b"#name#"lrl",
+ (BCLRL bibo, CR0)>;
+
def : InstAlias<"b"#name#"ctrl $cc",
(BCCTRL bibo, crrc:$cc)>;
def : InstAlias<"b"#name#"ctrl",
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