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authorChris Lattner <sabre@nondot.org>2012-05-30 18:08:02 +0000
committerChris Lattner <sabre@nondot.org>2012-05-30 18:08:02 +0000
commit1622a99e588653ce01cdd46026ee117e8ae3b0a8 (patch)
treeccd2403a0f562210aa1be2caed87efe52c4921b0 /llvm/lib/Target
parent04d722a68d16a383272c84f3b7386b654a6478e7 (diff)
downloadbcm5719-llvm-1622a99e588653ce01cdd46026ee117e8ae3b0a8.tar.gz
bcm5719-llvm-1622a99e588653ce01cdd46026ee117e8ae3b0a8.zip
it's pointed out that R11 can be used for magic things, and doing things just for 64-bit registers is silly. Just optimize 3 more.
llvm-svn: 157699
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86CallingConv.td2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86CallingConv.td b/llvm/lib/Target/X86/X86CallingConv.td
index aa97b8b36b1..a6d2709b372 100644
--- a/llvm/lib/Target/X86/X86CallingConv.td
+++ b/llvm/lib/Target/X86/X86CallingConv.td
@@ -35,7 +35,7 @@ def RetCC_X86Common : CallingConv<[
CCIfType<[i8] , CCAssignToReg<[AL, DL, CL]>>,
CCIfType<[i16], CCAssignToReg<[AX, DX, CX]>>,
CCIfType<[i32], CCAssignToReg<[EAX, EDX, ECX]>>,
- CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX, R11]>>,
+ CCIfType<[i64], CCAssignToReg<[RAX, RDX, RCX]>>,
// Vector types are returned in XMM0 and XMM1, when they fit. XMM2 and XMM3
// can only be used by ABI non-compliant code. If the target doesn't have XMM
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