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author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2018-01-19 13:49:53 +0000 |
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committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2018-01-19 13:49:53 +0000 |
commit | 0e074e349ded0904691d44bd2f5258a17008eb6f (patch) | |
tree | d3273cd31a6fd7550e4a3489e5a5c507a8ffc2f6 /llvm/lib/Target | |
parent | 4834bca106268ceae9259dac8c86d12e37f33cc5 (diff) | |
download | bcm5719-llvm-0e074e349ded0904691d44bd2f5258a17008eb6f.tar.gz bcm5719-llvm-0e074e349ded0904691d44bd2f5258a17008eb6f.zip |
[AMDGPU][MC] Corrected parsing of image modifiers and encoding of image atomics
See bugs
35962: https://bugs.llvm.org/show_bug.cgi?id=35962
35963: https://bugs.llvm.org/show_bug.cgi?id=35963
Differential Revision: https://reviews.llvm.org/D42184
Reviewers: vpykhtin, artem.tamazov, arsenm
llvm-svn: 322942
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 12 |
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 41d8947efc1..7a7ed39428e 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -4053,7 +4053,8 @@ void AMDGPUAsmParser::cvtMIMG(MCInst &Inst, const OperandVector &Operands, if (IsAtomic) { // Add src, same as dst - ((AMDGPUOperand &)*Operands[I]).addRegOperands(Inst, 1); + assert(Desc.getNumDefs() == 1); + ((AMDGPUOperand &)*Operands[I - 1]).addRegOperands(Inst, 1); } OptionalImmIndexMap OptionalIdx; @@ -4062,9 +4063,8 @@ void AMDGPUAsmParser::cvtMIMG(MCInst &Inst, const OperandVector &Operands, AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]); // Add the register arguments - if (Op.isRegOrImm()) { - Op.addRegOrImmOperands(Inst, 1); - continue; + if (Op.isReg()) { + Op.addRegOperands(Inst, 1); } else if (Op.isImmModifier()) { OptionalIdx[Op.getImmTy()] = I; } else { @@ -4075,11 +4075,11 @@ void AMDGPUAsmParser::cvtMIMG(MCInst &Inst, const OperandVector &Operands, addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDMask); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyUNorm); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyGLC); - addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDA); + addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySLC); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyR128); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyTFE); addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyLWE); - addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTySLC); + addOptionalImmOperand(Inst, Operands, OptionalIdx, AMDGPUOperand::ImmTyDA); } void AMDGPUAsmParser::cvtMIMGAtomic(MCInst &Inst, const OperandVector &Operands) { |