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| author | Sanjay Patel <spatel@rotateright.com> | 2018-04-08 19:56:04 +0000 |
|---|---|---|
| committer | Sanjay Patel <spatel@rotateright.com> | 2018-04-08 19:56:04 +0000 |
| commit | 0d7df36c668d54e95143f5a330997f32aaa0dd97 (patch) | |
| tree | 027ffa8ba4164265d74890175bed2bccfaff9135 /llvm/lib/Target | |
| parent | b7baa358f632324f593deeba3daa3268795bd258 (diff) | |
| download | bcm5719-llvm-0d7df36c668d54e95143f5a330997f32aaa0dd97.tar.gz bcm5719-llvm-0d7df36c668d54e95143f5a330997f32aaa0dd97.zip | |
[TargetSchedule] shrink interface for init(); NFCI
The TargetSchedModel is always initialized using the TargetSubtargetInfo's
MCSchedModel and TargetInstrInfo, so we don't need to extract those and
pass 3 parameters to init().
Differential Revision: https://reviews.llvm.org/D44789
llvm-svn: 329540
Diffstat (limited to 'llvm/lib/Target')
4 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp b/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp index e1851875abc..af555f6d226 100644 --- a/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp +++ b/llvm/lib/Target/AArch64/AArch64SIMDInstrOpt.cpp @@ -700,7 +700,7 @@ bool AArch64SIMDInstrOpt::runOnMachineFunction(MachineFunction &MF) { static_cast<const AArch64InstrInfo *>(ST.getInstrInfo()); if (!AAII) return false; - SchedModel.init(ST.getSchedModel(), &ST, AAII); + SchedModel.init(&ST); if (!SchedModel.hasInstrSchedModel()) return false; diff --git a/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp b/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp index 571e61d7083..2f7a597f3bf 100644 --- a/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp +++ b/llvm/lib/Target/AArch64/AArch64StorePairSuppress.cpp @@ -127,7 +127,7 @@ bool AArch64StorePairSuppress::runOnMachineFunction(MachineFunction &MF) { TII = static_cast<const AArch64InstrInfo *>(ST.getInstrInfo()); TRI = ST.getRegisterInfo(); MRI = &MF.getRegInfo(); - SchedModel.init(ST.getSchedModel(), &ST, TII); + SchedModel.init(&ST); Traces = &getAnalysis<MachineTraceMetrics>(); MinInstr = nullptr; diff --git a/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp b/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp index cee9d8cf5f9..51e8beb085a 100644 --- a/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp +++ b/llvm/lib/Target/SystemZ/SystemZMachineScheduler.cpp @@ -133,7 +133,7 @@ SystemZPostRASchedStrategy(const MachineSchedContext *C) (C->MF->getSubtarget().getInstrInfo())), MBB(nullptr), HazardRec(nullptr) { const TargetSubtargetInfo *ST = &C->MF->getSubtarget(); - SchedModel.init(ST->getSchedModel(), ST, TII); + SchedModel.init(ST); } SystemZPostRASchedStrategy::~SystemZPostRASchedStrategy() { diff --git a/llvm/lib/Target/X86/X86CmovConversion.cpp b/llvm/lib/Target/X86/X86CmovConversion.cpp index 489d9d86e25..493d42c85b4 100644 --- a/llvm/lib/Target/X86/X86CmovConversion.cpp +++ b/llvm/lib/Target/X86/X86CmovConversion.cpp @@ -178,7 +178,7 @@ bool X86CmovConverterPass::runOnMachineFunction(MachineFunction &MF) { MRI = &MF.getRegInfo(); TII = STI.getInstrInfo(); TRI = STI.getRegisterInfo(); - TSchedModel.init(STI.getSchedModel(), &STI, TII); + TSchedModel.init(&STI); // Before we handle the more subtle cases of register-register CMOVs inside // of potentially hot loops, we want to quickly remove all CMOVs with |

