repair x86 performance, dejagnu problems from previous change

llvm-svn: 35245

4 files changed, 32 insertions, 3 deletions

diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 17a41c5aaaa..2521e3b1d03 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -1392,8 +1392,8 @@ bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V,
 /// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
 /// and GV works for isLegalAddressImmediate _and_ both can be applied
 /// simultaneously to the same instruction.
-bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, 
-                                               GlobalValue *GV) const {
+bool ARMTargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                                  const Type* Ty) const {
   return false;
 }
 
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.h b/llvm/lib/Target/ARM/ARMISelLowering.h
index 1675e9cffef..2c2a2cd1b23 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.h
+++ b/llvm/lib/Target/ARM/ARMISelLowering.h
@@ -109,7 +109,8 @@ namespace llvm {
     /// isLegalAddressScaleAndImm - Return true if S works for 
     /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
     /// both can be applied simultaneously to the same instruction.
-    virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV) const;
+    virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                           const Type *Ty) const;
 
     /// getPreIndexedAddressParts - returns true by value, base pointer and
     /// offset pointer and addressing mode by reference if the node's address
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 117448225df..e178646e992 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -4064,6 +4064,22 @@ bool X86TargetLowering::isLegalAddressScale(int64_t S, const Type *Ty) const {
   }
 }
 
+/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
+/// and V works for isLegalAddressImmediate _and_ both can be applied
+/// simultaneously to the same instruction.
+bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, int64_t V, 
+                                               const Type* Ty) const {
+  return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(V, Ty);
+}
+
+/// isLegalAddressScaleAndImm - Return true if S works for IsLegalAddressScale
+/// and GV works for isLegalAddressImmediate _and_ both can be applied
+/// simultaneously to the same instruction.
+bool X86TargetLowering::isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                                  const Type* Ty) const {
+  return isLegalAddressScale(S, Ty) && isLegalAddressImmediate(GV);
+}
+
 /// isShuffleMaskLegal - Targets can use this to indicate that they only
 /// support *some* VECTOR_SHUFFLE operations, those with specific masks.
 /// By default, if a target supports the VECTOR_SHUFFLE node, all mask values
diff --git a/llvm/lib/Target/X86/X86ISelLowering.h b/llvm/lib/Target/X86/X86ISelLowering.h
index 120da0fb7b4..3ed8d18f4ed 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.h
+++ b/llvm/lib/Target/X86/X86ISelLowering.h
@@ -349,6 +349,18 @@ namespace llvm {
     /// type.
     virtual bool isLegalAddressScale(int64_t S, const Type *Ty) const;
 
+    /// isLegalAddressScaleAndImm - Return true if S works for 
+    /// IsLegalAddressScale and V works for isLegalAddressImmediate _and_ 
+    /// both can be applied simultaneously to the same instruction.
+    virtual bool isLegalAddressScaleAndImm(int64_t S, int64_t V, 
+                                           const Type *Ty) const;
+
+    /// isLegalAddressScaleAndImm - Return true if S works for 
+    /// IsLegalAddressScale and GV works for isLegalAddressImmediate _and_
+    /// both can be applied simultaneously to the same instruction.
+    virtual bool isLegalAddressScaleAndImm(int64_t S, GlobalValue *GV,
+                                           const Type *Ty) const;
+
     /// isShuffleMaskLegal - Targets can use this to indicate that they only
     /// support *some* VECTOR_SHUFFLE operations, those with specific masks.
     /// By default, if a target supports the VECTOR_SHUFFLE node, all mask