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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2016-06-02 10:48:52 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2016-06-02 10:48:52 +0000 |
| commit | 0b7bb16e5bcad91f45b1fa67b76aa726bfd306a9 (patch) | |
| tree | a245113f84a1dcc9c2ac7267fba6262374397c9d /llvm/lib/Target | |
| parent | 90df4a7c31393e8163a3999d045e613badb25e6f (diff) | |
| download | bcm5719-llvm-0b7bb16e5bcad91f45b1fa67b76aa726bfd306a9.tar.gz bcm5719-llvm-0b7bb16e5bcad91f45b1fa67b76aa726bfd306a9.zip | |
This adds support for Cortex-A73 as an available target.
Differential Revision: http://reviews.llvm.org/D20865
llvm-svn: 271508
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64.td | 3 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARM.td | 9 | ||||
| -rw-r--r-- | llvm/lib/Target/ARM/ARMSubtarget.h | 2 |
3 files changed, 12 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64.td b/llvm/lib/Target/AArch64/AArch64.td index 22255847ada..ca382a89692 100644 --- a/llvm/lib/Target/AArch64/AArch64.td +++ b/llvm/lib/Target/AArch64/AArch64.td @@ -150,8 +150,9 @@ def : ProcessorModel<"generic", NoSchedModel, [FeatureFPARMv8, def : ProcessorModel<"cortex-a35", CortexA53Model, [ProcA35]>; def : ProcessorModel<"cortex-a53", CortexA53Model, [ProcA53]>; def : ProcessorModel<"cortex-a57", CortexA57Model, [ProcA57]>; -// FIXME: Cortex-A72 is currently modelled as an Cortex-A57. +// FIXME: Cortex-A72 and Cortex-A73 are currently modelled as an Cortex-A57. def : ProcessorModel<"cortex-a72", CortexA57Model, [ProcA57]>; +def : ProcessorModel<"cortex-a73", CortexA57Model, [ProcA57]>; def : ProcessorModel<"cyclone", CycloneModel, [ProcCyclone]>; def : ProcessorModel<"exynos-m1", ExynosM1Model, [ProcExynosM1]>; def : ProcessorModel<"kryo", KryoModel, [ProcKryo]>; diff --git a/llvm/lib/Target/ARM/ARM.td b/llvm/lib/Target/ARM/ARM.td index 35f0c14c057..2281f2c979c 100644 --- a/llvm/lib/Target/ARM/ARM.td +++ b/llvm/lib/Target/ARM/ARM.td @@ -262,6 +262,8 @@ def ProcA57 : SubtargetFeature<"a57", "ARMProcFamily", "CortexA57", "Cortex-A57 ARM processors", []>; def ProcA72 : SubtargetFeature<"a72", "ARMProcFamily", "CortexA72", "Cortex-A72 ARM processors", []>; +def ProcA73 : SubtargetFeature<"a73", "ARMProcFamily", "CortexA73", + "Cortex-A73 ARM processors", []>; def ProcKrait : SubtargetFeature<"krait", "ARMProcFamily", "Krait", "Qualcomm ARM processors", []>; @@ -690,6 +692,13 @@ def : ProcNoItin<"cortex-a72", [ARMv8a, ProcA72, FeatureCrypto, FeatureCRC]>; +def : ProcNoItin<"cortex-a73", [ARMv8a, ProcA73, + FeatureHWDiv, + FeatureHWDivARM, + FeatureT2XtPk, + FeatureCrypto, + FeatureCRC]>; + // Cyclone is very similar to swift def : ProcessorModel<"cyclone", SwiftModel, [ARMv8a, ProcSwift, FeatureHasRAS, diff --git a/llvm/lib/Target/ARM/ARMSubtarget.h b/llvm/lib/Target/ARM/ARMSubtarget.h index 7c9ea7d9253..43e911e934f 100644 --- a/llvm/lib/Target/ARM/ARMSubtarget.h +++ b/llvm/lib/Target/ARM/ARMSubtarget.h @@ -44,7 +44,7 @@ protected: enum ARMProcFamilyEnum { Others, CortexA5, CortexA7, CortexA8, CortexA9, CortexA12, CortexA15, CortexA17, CortexR4, CortexR4F, CortexR5, CortexR7, CortexM3, - CortexA32, CortexA35, CortexA53, CortexA57, CortexA72, + CortexA32, CortexA35, CortexA53, CortexA57, CortexA72, CortexA73, Krait, Swift, ExynosM1 }; enum ARMProcClassEnum { |
