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| author | Michael Liao <michael.liao@intel.com> | 2013-05-02 09:22:04 +0000 |
|---|---|---|
| committer | Michael Liao <michael.liao@intel.com> | 2013-05-02 09:22:04 +0000 |
| commit | 06badde1ac96985f5692b3f579dc366c5c12d0d0 (patch) | |
| tree | cb4593a0682fc839a72feb6363cbd79e0993449b /llvm/lib/Target | |
| parent | afafa98fa87511cd10ef9652aed6bebbe09949f6 (diff) | |
| download | bcm5719-llvm-06badde1ac96985f5692b3f579dc366c5c12d0d0.tar.gz bcm5719-llvm-06badde1ac96985f5692b3f579dc366c5c12d0d0.zip | |
80-col fixup.
llvm-svn: 180915
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 7eb4f6b43c8..26ad64eeca6 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -11032,7 +11032,8 @@ SDValue X86TargetLowering::LowerFRAMEADDR(SDValue Op, SelectionDAG &DAG) const { unsigned Depth = cast<ConstantSDNode>(Op.getOperand(0))->getZExtValue(); unsigned FrameReg = RegInfo->getFrameRegister(DAG.getMachineFunction()); assert(((FrameReg == X86::RBP && VT == MVT::i64) || - (FrameReg == X86::EBP && VT == MVT::i32)) && "Invalid Frame Register!"); + (FrameReg == X86::EBP && VT == MVT::i32)) && + "Invalid Frame Register!"); SDValue FrameAddr = DAG.getCopyFromReg(DAG.getEntryNode(), dl, FrameReg, VT); while (Depth--) FrameAddr = DAG.getLoad(VT, dl, DAG.getEntryNode(), FrameAddr, @@ -11061,7 +11062,7 @@ SDValue X86TargetLowering::LowerEH_RETURN(SDValue Op, SelectionDAG &DAG) const { unsigned StoreAddrReg = (PtrVT == MVT::i64) ? X86::RCX : X86::ECX; SDValue StoreAddr = DAG.getNode(ISD::ADD, dl, PtrVT, Frame, - DAG.getIntPtrConstant(RegInfo->getSlotSize())); + DAG.getIntPtrConstant(RegInfo->getSlotSize())); StoreAddr = DAG.getNode(ISD::ADD, dl, PtrVT, StoreAddr, Offset); Chain = DAG.getStore(Chain, dl, Handler, StoreAddr, MachinePointerInfo(), false, false, 0); |
