[DebugInfo] Fix ARM/AArch64 prologue_end position. Related to D11268.

Summary:
This review is related to another review request http://reviews.llvm.org/D11268, does the same and merely fixes a couple of issues with it.

D11268 is quite old and has merge conflicts against the current trunk.
This request 
 - rebases D11268 onto the new trunk;
 - resolves the merge conflicts;
 - fixes the prologue_end tests, which do not pass due to the subprogram definitions not marked as distinct.

Reviewers: echristo, rengolin, kubabrecka

Subscribers: aemerson, rengolin, jyknight, dsanders, llvm-commits, asl

Differential Revision: http://reviews.llvm.org/D14338

llvm-svn: 252177

9 files changed, 131 insertions, 116 deletions

diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
index cd5821f081c..6ccb959239e 100644
--- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp
@@ -284,13 +284,16 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF,
       MF.getSubtarget().getRegisterInfo());
   const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
   MachineModuleInfo &MMI = MF.getMMI();
-  AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();
-  bool needsFrameMoves = MMI.hasDebugInfo() || Fn->needsUnwindTableEntry();
-  bool HasFP = hasFP(MF);
-  DebugLoc DL = MBB.findDebugLoc(MBBI);
-
-  // All calls are tail calls in GHC calling conv, and functions have no
-  // prologue/epilogue.
+  AArch64FunctionInfo *AFI = MF.getInfo<AArch64FunctionInfo>();

+  bool needsFrameMoves = MMI.hasDebugInfo() || Fn->needsUnwindTableEntry();

+  bool HasFP = hasFP(MF);

+

+  // Debug location must be unknown since the first debug location is used

+  // to determine the end of the prologue.

+  DebugLoc DL;

+

+  // All calls are tail calls in GHC calling conv, and functions have no

+  // prologue/epilogue.

   if (MF.getFunction()->getCallingConv() == CallingConv::GHC)
     return;
 
@@ -727,15 +730,12 @@ bool AArch64FrameLowering::spillCalleeSavedRegisters(
   MachineFunction &MF = *MBB.getParent();
   const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
   unsigned Count = CSI.size();
-  DebugLoc DL;
-  assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");
-
-  if (MI != MBB.end())
-    DL = MI->getDebugLoc();
-
-  for (unsigned i = 0; i < Count; i += 2) {
-    unsigned idx = Count - i - 2;
-    unsigned Reg1 = CSI[idx].getReg();
+  DebugLoc DL;

+  assert((Count & 1) == 0 && "Odd number of callee-saved regs to spill!");

+

+  for (unsigned i = 0; i < Count; i += 2) {

+    unsigned idx = Count - i - 2;

+    unsigned Reg1 = CSI[idx].getReg();

     unsigned Reg2 = CSI[idx + 1].getReg();
     // GPRs and FPRs are saved in pairs of 64-bit regs. We expect the CSI
     // list to come in sorted by frame index so that we can issue the store
diff --git a/llvm/lib/Target/ARM/ARMFrameLowering.cpp b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
index 966f0310f0b..98655203a4f 100644
--- a/llvm/lib/Target/ARM/ARMFrameLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMFrameLowering.cpp
@@ -302,13 +302,17 @@ void ARMFrameLowering::emitPrologue(MachineFunction &MF,
          "This emitPrologue does not support Thumb1!");
   bool isARM = !AFI->isThumbFunction();
   unsigned Align = STI.getFrameLowering()->getStackAlignment();
-  unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize();
-  unsigned NumBytes = MFI->getStackSize();
-  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
-  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-  unsigned FramePtr = RegInfo->getFrameRegister(MF);
-
-  // Determine the sizes of each callee-save spill areas and record which frame
+  unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize();

+  unsigned NumBytes = MFI->getStackSize();

+  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();

+

+  // Debug location must be unknown since the first debug location is used

+  // to determine the end of the prologue.

+  DebugLoc dl;

+  

+  unsigned FramePtr = RegInfo->getFrameRegister(MF);

+

+  // Determine the sizes of each callee-save spill areas and record which frame

   // belongs to which callee-save spill areas.
   unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
   int FramePtrSpillFI = 0;
@@ -890,13 +894,12 @@ void ARMFrameLowering::emitPushInst(MachineBasicBlock &MBB,
                                     unsigned NumAlignedDPRCS2Regs,
                                     unsigned MIFlags) const {
   MachineFunction &MF = *MBB.getParent();
-  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();
-
-  DebugLoc DL;
-  if (MI != MBB.end()) DL = MI->getDebugLoc();
-
-  SmallVector<std::pair<unsigned,bool>, 4> Regs;
-  unsigned i = CSI.size();
+  const TargetInstrInfo &TII = *MF.getSubtarget().getInstrInfo();

+

+  DebugLoc DL;

+

+  SmallVector<std::pair<unsigned,bool>, 4> Regs;

+  unsigned i = CSI.size();

   while (i != 0) {
     unsigned LastReg = 0;
     for (; i != 0; --i) {
diff --git a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
index 6ee5bb82d1c..791e0acbe26 100644
--- a/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
+++ b/llvm/lib/Target/ARM/Thumb1FrameLowering.cpp
@@ -97,13 +97,17 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF,
 
   unsigned ArgRegsSaveSize = AFI->getArgRegsSaveSize();
   unsigned NumBytes = MFI->getStackSize();
-  assert(NumBytes >= ArgRegsSaveSize &&
-         "ArgRegsSaveSize is included in NumBytes");
-  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
-  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-  unsigned FramePtr = RegInfo->getFrameRegister(MF);
-  unsigned BasePtr = RegInfo->getBaseRegister();
-  int CFAOffset = 0;
+  assert(NumBytes >= ArgRegsSaveSize &&

+         "ArgRegsSaveSize is included in NumBytes");

+  const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();

+

+  // Debug location must be unknown since the first debug location is used

+  // to determine the end of the prologue.

+  DebugLoc dl;

+  

+  unsigned FramePtr = RegInfo->getFrameRegister(MF);

+  unsigned BasePtr = RegInfo->getBaseRegister();

+  int CFAOffset = 0;

 
   // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
   NumBytes = (NumBytes + 3) & ~3;
@@ -165,14 +169,12 @@ void Thumb1FrameLowering::emitPrologue(MachineFunction &MF,
       DPRCSSize += 8;
     }
   }
-
-  if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
-    ++MBBI;
-    if (MBBI != MBB.end())
-      dl = MBBI->getDebugLoc();
-  }
-
-  // Determine starting offsets of spill areas.
+

+  if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {

+    ++MBBI;

+  }

+

+  // Determine starting offsets of spill areas.

   unsigned DPRCSOffset  = NumBytes - ArgRegsSaveSize - (GPRCS1Size + GPRCS2Size + DPRCSSize);
   unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
   unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
@@ -543,14 +545,12 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
   if (CSI.empty())
     return false;
 
-  DebugLoc DL;
-  const TargetInstrInfo &TII = *STI.getInstrInfo();
-
-  if (MI != MBB.end()) DL = MI->getDebugLoc();
-
-  MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
-  AddDefaultPred(MIB);
-  for (unsigned i = CSI.size(); i != 0; --i) {
+  DebugLoc DL;

+  const TargetInstrInfo &TII = *STI.getInstrInfo();

+

+  MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));

+  AddDefaultPred(MIB);

+  for (unsigned i = CSI.size(); i != 0; --i) {

     unsigned Reg = CSI[i-1].getReg();
     bool isKill = true;
 
diff --git a/llvm/lib/Target/Mips/Mips16FrameLowering.cpp b/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
index 71c2bdba2f9..7994c61fcdd 100644
--- a/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
+++ b/llvm/lib/Target/Mips/Mips16FrameLowering.cpp
@@ -36,13 +36,17 @@ void Mips16FrameLowering::emitPrologue(MachineFunction &MF,
                                        MachineBasicBlock &MBB) const {
   assert(&MF.front() == &MBB && "Shrink-wrapping not yet supported");
   MachineFrameInfo *MFI = MF.getFrameInfo();
-  const Mips16InstrInfo &TII =
-      *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());
-  MachineBasicBlock::iterator MBBI = MBB.begin();
-  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-  uint64_t StackSize = MFI->getStackSize();
-
-  // No need to allocate space on the stack.
+  const Mips16InstrInfo &TII =

+      *static_cast<const Mips16InstrInfo *>(STI.getInstrInfo());

+  MachineBasicBlock::iterator MBBI = MBB.begin();

+

+  // Debug location must be unknown since the first debug location is used

+  // to determine the end of the prologue.

+  DebugLoc dl;

+

+  uint64_t StackSize = MFI->getStackSize();

+

+  // No need to allocate space on the stack.

   if (StackSize == 0 && !MFI->adjustsStack()) return;
 
   MachineModuleInfo &MMI = MF.getMMI();
diff --git a/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp b/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
index bce2c1eb448..f471464b904 100644
--- a/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
+++ b/llvm/lib/Target/Mips/Mips16ISelDAGToDAG.cpp
@@ -70,13 +70,13 @@ void Mips16DAGToDAGISel::initGlobalBaseReg(MachineFunction &MF) {
     return;
 
   MachineBasicBlock &MBB = MF.front();
-  MachineBasicBlock::iterator I = MBB.begin();
-  MachineRegisterInfo &RegInfo = MF.getRegInfo();
-  const TargetInstrInfo &TII = *Subtarget->getInstrInfo();
-  DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
-  unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg();
-  const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;
-
+  MachineBasicBlock::iterator I = MBB.begin();

+  MachineRegisterInfo &RegInfo = MF.getRegInfo();

+  const TargetInstrInfo &TII = *Subtarget->getInstrInfo();

+  DebugLoc DL;

+  unsigned V0, V1, V2, GlobalBaseReg = MipsFI->getGlobalBaseReg();

+  const TargetRegisterClass *RC = &Mips::CPU16RegsRegClass;

+

   V0 = RegInfo.createVirtualRegister(RC);
   V1 = RegInfo.createVirtualRegister(RC);
   V2 = RegInfo.createVirtualRegister(RC);
diff --git a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
index a49572efdbf..c7c87d38db9 100644
--- a/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
+++ b/llvm/lib/Target/Mips/Mips16InstrInfo.cpp
@@ -193,13 +193,13 @@ static void addSaveRestoreRegs(MachineInstrBuilder &MIB,
   }
 }
 // Adjust SP by FrameSize bytes. Save RA, S0, S1
-void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,
-                                MachineBasicBlock &MBB,
-                                MachineBasicBlock::iterator I) const {
-  DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
-  MachineFunction &MF = *MBB.getParent();
-  MachineFrameInfo *MFI    = MF.getFrameInfo();
-  const BitVector Reserved = RI.getReservedRegs(MF);
+void Mips16InstrInfo::makeFrame(unsigned SP, int64_t FrameSize,

+                                MachineBasicBlock &MBB,

+                                MachineBasicBlock::iterator I) const {

+  DebugLoc DL;

+  MachineFunction &MF = *MBB.getParent();

+  MachineFrameInfo *MFI    = MF.getFrameInfo();

+  const BitVector Reserved = RI.getReservedRegs(MF);

   bool SaveS2 = Reserved[Mips::S2];
   MachineInstrBuilder MIB;
   unsigned Opc = ((FrameSize <= 128) && !SaveS2)? Mips::Save16:Mips::SaveX16;
@@ -260,13 +260,13 @@ void Mips16InstrInfo::restoreFrame(unsigned SP, int64_t FrameSize,
 // This is clearly safe at prologue and epilogue.
 //
 void Mips16InstrInfo::adjustStackPtrBig(unsigned SP, int64_t Amount,
-                                        MachineBasicBlock &MBB,
-                                        MachineBasicBlock::iterator I,
-                                        unsigned Reg1, unsigned Reg2) const {
-  DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
-  //
-  // li reg1, constant
-  // move reg2, sp
+                                        MachineBasicBlock &MBB,

+                                        MachineBasicBlock::iterator I,

+                                        unsigned Reg1, unsigned Reg2) const {

+  DebugLoc DL;

+  //

+  // li reg1, constant

+  // move reg2, sp

   // add reg1, reg1, reg2
   // move sp, reg1
   //
@@ -443,13 +443,13 @@ const MCInstrDesc &Mips16InstrInfo::AddiuSpImm(int64_t Imm) const {
   else
     return get(Mips::AddiuSpImmX16);
 }
-
-void Mips16InstrInfo::BuildAddiuSpImm
-  (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const {
-  DebugLoc DL = I != MBB.end() ? I->getDebugLoc() : DebugLoc();
-  BuildMI(MBB, I, DL, AddiuSpImm(Imm)).addImm(Imm);
-}
-
+

+void Mips16InstrInfo::BuildAddiuSpImm

+  (MachineBasicBlock &MBB, MachineBasicBlock::iterator I, int64_t Imm) const {

+  DebugLoc DL;

+  BuildMI(MBB, I, DL, AddiuSpImm(Imm)).addImm(Imm);

+}

+

 const MipsInstrInfo *llvm::createMips16InstrInfo(const MipsSubtarget &STI) {
   return new Mips16InstrInfo(STI);
 }
diff --git a/llvm/lib/Target/Sparc/SparcFrameLowering.cpp b/llvm/lib/Target/Sparc/SparcFrameLowering.cpp
index b92450962f0..a9d22ccdae3 100644
--- a/llvm/lib/Target/Sparc/SparcFrameLowering.cpp
+++ b/llvm/lib/Target/Sparc/SparcFrameLowering.cpp
@@ -41,13 +41,13 @@ void SparcFrameLowering::emitSPAdjustment(MachineFunction &MF,
                                           MachineBasicBlock &MBB,
                                           MachineBasicBlock::iterator MBBI,
                                           int NumBytes,
-                                          unsigned ADDrr,
-                                          unsigned ADDri) const {
-
-  DebugLoc dl = (MBBI != MBB.end()) ? MBBI->getDebugLoc() : DebugLoc();
-  const SparcInstrInfo &TII =
-      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());
-
+                                          unsigned ADDrr,

+                                          unsigned ADDri) const {

+

+  DebugLoc dl;

+  const SparcInstrInfo &TII =

+      *static_cast<const SparcInstrInfo *>(MF.getSubtarget().getInstrInfo());

+

   if (NumBytes >= -4096 && NumBytes < 4096) {
     BuildMI(MBB, MBBI, dl, TII.get(ADDri), SP::O6)
       .addReg(SP::O6).addImm(NumBytes);
@@ -93,7 +93,9 @@ void SparcFrameLowering::emitPrologue(MachineFunction &MF,
   const SparcRegisterInfo &RegInfo =
       *static_cast<const SparcRegisterInfo *>(MF.getSubtarget().getRegisterInfo());
   MachineBasicBlock::iterator MBBI = MBB.begin();
-  DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
+  // Debug location must be unknown since the first debug location is used
+  // to determine the end of the prologue.
+  DebugLoc dl;
   bool NeedsStackRealignment = RegInfo.needsStackRealignment(MF);
 
   // FIXME: unfortunately, returning false from canRealignStack
diff --git a/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp b/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
index 12c4310b78f..940ea117852 100644
--- a/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
+++ b/llvm/lib/Target/SystemZ/SystemZFrameLowering.cpp
@@ -130,13 +130,13 @@ spillCalleeSavedRegisters(MachineBasicBlock &MBB,
     return false;
 
   MachineFunction &MF = *MBB.getParent();
-  const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();
-  SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
-  bool IsVarArg = MF.getFunction()->isVarArg();
-  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-
-  // Scan the call-saved GPRs and find the bounds of the register spill area.
-  unsigned LowGPR = 0;
+  const TargetInstrInfo *TII = MF.getSubtarget().getInstrInfo();

+  SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();

+  bool IsVarArg = MF.getFunction()->isVarArg();

+  DebugLoc DL;

+

+  // Scan the call-saved GPRs and find the bounds of the register spill area.

+  unsigned LowGPR = 0;

   unsigned HighGPR = SystemZ::R15D;
   unsigned StartOffset = -1U;
   for (unsigned I = 0, E = CSI.size(); I != E; ++I) {
@@ -319,13 +319,16 @@ void SystemZFrameLowering::emitPrologue(MachineFunction &MF,
   SystemZMachineFunctionInfo *ZFI = MF.getInfo<SystemZMachineFunctionInfo>();
   MachineBasicBlock::iterator MBBI = MBB.begin();
   MachineModuleInfo &MMI = MF.getMMI();
-  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();
-  const std::vector<CalleeSavedInfo> &CSI = MFFrame->getCalleeSavedInfo();
-  bool HasFP = hasFP(MF);
-  DebugLoc DL = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
-
-  // The current offset of the stack pointer from the CFA.
-  int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;
+  const MCRegisterInfo *MRI = MMI.getContext().getRegisterInfo();

+  const std::vector<CalleeSavedInfo> &CSI = MFFrame->getCalleeSavedInfo();

+  bool HasFP = hasFP(MF);

+

+  // Debug location must be unknown since the first debug location is used

+  // to determine the end of the prologue.

+  DebugLoc DL;

+

+  // The current offset of the stack pointer from the CFA.

+  int64_t SPOffsetFromCFA = -SystemZMC::CFAOffsetFromInitialSP;

 
   if (ZFI->getLowSavedGPR()) {
     // Skip over the GPR saves.
diff --git a/llvm/lib/Target/X86/X86FrameLowering.cpp b/llvm/lib/Target/X86/X86FrameLowering.cpp
index ae4cc77fcc9..be6cec6fa59 100644
--- a/llvm/lib/Target/X86/X86FrameLowering.cpp
+++ b/llvm/lib/Target/X86/X86FrameLowering.cpp
@@ -637,12 +637,15 @@ void X86FrameLowering::emitPrologue(MachineFunction &MF,
   unsigned FramePtr = TRI->getFrameRegister(MF);
   const unsigned MachineFramePtr =
       STI.isTarget64BitILP32()
-          ? getX86SubSuperRegister(FramePtr, MVT::i64, false)
-          : FramePtr;
-  unsigned BasePtr = TRI->getBaseRegister();
-  DebugLoc DL;
-
-  // Add RETADDR move area to callee saved frame size.
+          ? getX86SubSuperRegister(FramePtr, MVT::i64, false)

+          : FramePtr;

+  unsigned BasePtr = TRI->getBaseRegister();

+  

+  // Debug location must be unknown since the first debug location is used

+  // to determine the end of the prologue.

+  DebugLoc DL;

+

+  // Add RETADDR move area to callee saved frame size.

   int TailCallReturnAddrDelta = X86FI->getTCReturnAddrDelta();
   if (TailCallReturnAddrDelta && IsWin64Prologue)
     report_fatal_error("Can't handle guaranteed tail call under win64 yet");