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authorSimon Atanasyan <simon@atanasyan.com>2018-07-12 08:50:11 +0000
committerSimon Atanasyan <simon@atanasyan.com>2018-07-12 08:50:11 +0000
commit053ff544783c70d263755eb4fb028b6f66a3163c (patch)
tree091748fa5655bf207a08ceb460e214b1ec0ab6b4 /llvm/lib/Target
parentd55ec633e61f93796584f9ee70d1f275df37f2e0 (diff)
downloadbcm5719-llvm-053ff544783c70d263755eb4fb028b6f66a3163c.tar.gz
bcm5719-llvm-053ff544783c70d263755eb4fb028b6f66a3163c.zip
[mips] Mark standard encoded instructions as not being in MIPS16e
Mark standard encoded instructions and pseudo "standard encoded" as not being in MIPS16e by default. Patch by Simon Dardis. Differential revision: https://reviews.llvm.org/D48379 llvm-svn: 336893
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/Mips/MipsInstrFormats.td4
-rw-r--r--llvm/lib/Target/Mips/MipsMSAInstrInfo.td2
2 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/Mips/MipsInstrFormats.td b/llvm/lib/Target/Mips/MipsInstrFormats.td
index 04bb7101014..ebbdcdf0df8 100644
--- a/llvm/lib/Target/Mips/MipsInstrFormats.td
+++ b/llvm/lib/Target/Mips/MipsInstrFormats.td
@@ -120,7 +120,7 @@ class MipsInst<dag outs, dag ins, string asmstr, list<dag> pattern,
class InstSE<dag outs, dag ins, string asmstr, list<dag> pattern,
InstrItinClass itin, Format f, string opstr = ""> :
MipsInst<outs, ins, asmstr, pattern, itin, f> {
- let EncodingPredicates = [HasStdEnc];
+ let EncodingPredicates = [NotInMips16Mode];
string BaseOpcode = opstr;
string Arch;
}
@@ -137,7 +137,7 @@ class MipsPseudo<dag outs, dag ins, list<dag> pattern,
class PseudoSE<dag outs, dag ins, list<dag> pattern,
InstrItinClass itin = IIPseudo> :
MipsPseudo<outs, ins, pattern, itin> {
- let EncodingPredicates = [HasStdEnc];
+ let EncodingPredicates = [NotInMips16Mode];
}
// Pseudo-instructions for alternate assembly syntax (never used by codegen).
diff --git a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td
index 34209d5871e..f43f5d74ead 100644
--- a/llvm/lib/Target/Mips/MipsMSAInstrInfo.td
+++ b/llvm/lib/Target/Mips/MipsMSAInstrInfo.td
@@ -3752,7 +3752,7 @@ def SZ_V_PSEUDO : MSA_CBRANCH_PSEUDO_DESC_BASE<MipsVAnyZero, v16i8,
// Pseudoes used to implement transparent fp16 support.
-let Predicates = [HasMSA] in {
+let ASEPredicate = [HasMSA] in {
def ST_F16 : MipsPseudo<(outs), (ins MSA128F16:$ws, mem_simm10:$addr),
[(store (f16 MSA128F16:$ws), (addrimm10:$addr))]> {
let usesCustomInserter = 1;
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