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authorDavid Green <david.green@arm.com>2019-07-24 17:26:26 +0000
committerDavid Green <david.green@arm.com>2019-07-24 17:26:26 +0000
commit047a0b6575d77d997cc1789e7f7687d5daaa00cf (patch)
treec382acccff798409d613749872161559c0e19ace /llvm/lib/Target
parentc19c30776aee685127dbe7b2c756bf54a803064b (diff)
downloadbcm5719-llvm-047a0b6575d77d997cc1789e7f7687d5daaa00cf.tar.gz
bcm5719-llvm-047a0b6575d77d997cc1789e7f7687d5daaa00cf.zip
[ARM] Disable MVE fptosi and friends
The prevents us from trying to convert an i1 predicate vector to a float, or vice-versa. Better patterns are possible, which will follow in a subsequent commit. For now we just expand them. Differential Revision: https://reviews.llvm.org/D65066 llvm-svn: 366931
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/ARM/ARMISelLowering.cpp4
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMISelLowering.cpp b/llvm/lib/Target/ARM/ARMISelLowering.cpp
index 276791165f5..2c54ad6e547 100644
--- a/llvm/lib/Target/ARM/ARMISelLowering.cpp
+++ b/llvm/lib/Target/ARM/ARMISelLowering.cpp
@@ -349,6 +349,10 @@ void ARMTargetLowering::addMVEVectorTypes(bool HasMVEFP) {
setOperationAction(ISD::EXTRACT_VECTOR_ELT, VT, Custom);
setOperationAction(ISD::SETCC, VT, Custom);
setOperationAction(ISD::SCALAR_TO_VECTOR, VT, Expand);
+ setOperationAction(ISD::FP_TO_SINT, VT, Expand);
+ setOperationAction(ISD::FP_TO_UINT, VT, Expand);
+ setOperationAction(ISD::SINT_TO_FP, VT, Expand);
+ setOperationAction(ISD::UINT_TO_FP, VT, Expand);
}
}
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