diff options
| author | Tom Stellard <thomas.stellard@amd.com> | 2014-02-06 18:36:34 +0000 |
|---|---|---|
| committer | Tom Stellard <thomas.stellard@amd.com> | 2014-02-06 18:36:34 +0000 |
| commit | 044e418f15083f92bbbcc9146106c15d169a0d3f (patch) | |
| tree | c392b4e699d8741614371dab615cd36a941b1d13 /llvm/lib/Target | |
| parent | 728c5540eef2622fa30c0ca42727b111ff182ce1 (diff) | |
| download | bcm5719-llvm-044e418f15083f92bbbcc9146106c15d169a0d3f.tar.gz bcm5719-llvm-044e418f15083f92bbbcc9146106c15d169a0d3f.zip | |
R600/SI: Use immediates offsets for SMRD instructions whenever possible
There was a problem with the old pattern, so we were copying some
larger immediates into registers when we could have been encoding
them in the instruction.
llvm-svn: 200932
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/R600/SIInstrInfo.td | 17 | ||||
| -rw-r--r-- | llvm/lib/Target/R600/SIInstructions.td | 6 |
2 files changed, 13 insertions, 10 deletions
diff --git a/llvm/lib/Target/R600/SIInstrInfo.td b/llvm/lib/Target/R600/SIInstrInfo.td index 97d37d894ab..871509f1942 100644 --- a/llvm/lib/Target/R600/SIInstrInfo.td +++ b/llvm/lib/Target/R600/SIInstrInfo.td @@ -75,15 +75,14 @@ def HI32f : SDNodeXForm<fpimm, [{ return CurDAG->getTargetConstantFP(APFloat(APFloat::IEEEsingle, V), MVT::f32); }]>; -def IMM8bitDWORD : ImmLeaf < - i32, [{ - return (Imm & ~0x3FC) == 0; - }], SDNodeXForm<imm, [{ - return CurDAG->getTargetConstant( - N->getZExtValue() >> 2, MVT::i32); - }]> +def IMM8bitDWORD : PatLeaf <(imm), + [{return (N->getZExtValue() & ~0x3FC) == 0;}] >; +def as_dword_i32imm : SDNodeXForm<imm, [{ + return CurDAG->getTargetConstant(N->getZExtValue() >> 2, MVT::i32); +}]>; + def as_i1imm : SDNodeXForm<imm, [{ return CurDAG->getTargetConstant(N->getZExtValue(), MVT::i1); }]>; @@ -96,6 +95,10 @@ def as_i16imm : SDNodeXForm<imm, [{ return CurDAG->getTargetConstant(N->getSExtValue(), MVT::i16); }]>; +def as_i32imm: SDNodeXForm<imm, [{ + return CurDAG->getTargetConstant(N->getSExtValue(), MVT::i32); +}]>; + def IMM12bit : PatLeaf <(imm), [{return isUInt<12>(N->getZExtValue());}] >; diff --git a/llvm/lib/Target/R600/SIInstructions.td b/llvm/lib/Target/R600/SIInstructions.td index 25fd7d50508..d00deba0d48 100644 --- a/llvm/lib/Target/R600/SIInstructions.td +++ b/llvm/lib/Target/R600/SIInstructions.td @@ -1846,7 +1846,7 @@ def : Pat < // 1. Offset as 8bit DWORD immediate def : Pat < (SIload_constant i128:$sbase, IMM8bitDWORD:$offset), - (S_BUFFER_LOAD_DWORD_IMM $sbase, IMM8bitDWORD:$offset) + (S_BUFFER_LOAD_DWORD_IMM $sbase, (as_dword_i32imm $offset)) >; // 2. Offset loaded in an 32bit SGPR @@ -1926,8 +1926,8 @@ multiclass SMRD_Pattern <SMRD Instr_IMM, SMRD Instr_SGPR, ValueType vt> { // 1. Offset as 8bit DWORD immediate def : Pat < - (constant_load (SIadd64bit32bit i64:$sbase, IMM8bitDWORD:$offset)), - (vt (Instr_IMM $sbase, IMM8bitDWORD:$offset)) + (constant_load (add i64:$sbase, (i64 IMM8bitDWORD:$offset))), + (vt (Instr_IMM $sbase, (as_dword_i32imm $offset))) >; // 2. Offset loaded in an 32bit SGPR |
