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authorEvan Cheng <evan.cheng@apple.com>2007-12-20 19:57:09 +0000
committerEvan Cheng <evan.cheng@apple.com>2007-12-20 19:57:09 +0000
commit01c7c198ee7ab7a4cc78ac6e3f1c3a587fe5d414 (patch)
tree55fc3a519e437d7f5f84c889f2ebb68493d212e9 /llvm/lib/Target
parent5e2413384e1bd1033d20647abf0107796944096f (diff)
downloadbcm5719-llvm-01c7c198ee7ab7a4cc78ac6e3f1c3a587fe5d414.tar.gz
bcm5719-llvm-01c7c198ee7ab7a4cc78ac6e3f1c3a587fe5d414.zip
Fix JIT encoding for CMPSD as well.
llvm-svn: 45268
Diffstat (limited to 'llvm/lib/Target')
-rw-r--r--llvm/lib/Target/X86/X86InstrFormats.td4
-rw-r--r--llvm/lib/Target/X86/X86InstrSSE.td8
2 files changed, 8 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrFormats.td b/llvm/lib/Target/X86/X86InstrFormats.td
index 1eda93b0e9f..8ac32077506 100644
--- a/llvm/lib/Target/X86/X86InstrFormats.td
+++ b/llvm/lib/Target/X86/X86InstrFormats.td
@@ -156,11 +156,15 @@ class PSIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
// SSE2 Instruction Templates:
//
// SDI - SSE2 instructions with XD prefix.
+// SDIi8 - SSE2 instructions with ImmT == Imm8 and XD prefix.
// PDI - SSE2 instructions with TB and OpSize prefixes.
// PDIi8 - SSE2 instructions with ImmT == Imm8 and TB and OpSize prefixes.
class SDI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern>
: I<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>;
+class SDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
+ list<dag> pattern>
+ : Ii8<o, F, outs, ins, asm, pattern>, XD, Requires<[HasSSE2]>;
class PDI<bits<8> o, Format F, dag outs, dag ins, string asm, list<dag> pattern>
: I<o, F, outs, ins, asm, pattern>, TB, OpSize, Requires<[HasSSE2]>;
class PDIi8<bits<8> o, Format F, dag outs, dag ins, string asm,
diff --git a/llvm/lib/Target/X86/X86InstrSSE.td b/llvm/lib/Target/X86/X86InstrSSE.td
index d6a77a2e3bf..1eb20185179 100644
--- a/llvm/lib/Target/X86/X86InstrSSE.td
+++ b/llvm/lib/Target/X86/X86InstrSSE.td
@@ -1085,10 +1085,10 @@ def Int_CVTTSD2SIrm : SDI<0x2C, MRMSrcMem, (outs GR32:$dst), (ins f128mem:$src),
// Comparison instructions
let isTwoAddress = 1 in {
- def CMPSDrr : SDI<0xC2, MRMSrcReg,
+ def CMPSDrr : SDIi8<0xC2, MRMSrcReg,
(outs FR64:$dst), (ins FR64:$src1, FR64:$src, SSECC:$cc),
"cmp${cc}sd\t{$src, $dst|$dst, $src}", []>;
- def CMPSDrm : SDI<0xC2, MRMSrcMem,
+ def CMPSDrm : SDIi8<0xC2, MRMSrcMem,
(outs FR64:$dst), (ins FR64:$src1, f64mem:$src, SSECC:$cc),
"cmp${cc}sd\t{$src, $dst|$dst, $src}", []>;
}
@@ -1105,12 +1105,12 @@ def UCOMISDrm: PDI<0x2E, MRMSrcMem, (outs), (ins FR64:$src1, f64mem:$src2),
// Aliases to match intrinsics which expect XMM operand(s).
let isTwoAddress = 1 in {
- def Int_CMPSDrr : SDI<0xC2, MRMSrcReg,
+ def Int_CMPSDrr : SDIi8<0xC2, MRMSrcReg,
(outs VR128:$dst), (ins VR128:$src1, VR128:$src, SSECC:$cc),
"cmp${cc}sd\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1,
VR128:$src, imm:$cc))]>;
- def Int_CMPSDrm : SDI<0xC2, MRMSrcMem,
+ def Int_CMPSDrm : SDIi8<0xC2, MRMSrcMem,
(outs VR128:$dst), (ins VR128:$src1, f64mem:$src, SSECC:$cc),
"cmp${cc}sd\t{$src, $dst|$dst, $src}",
[(set VR128:$dst, (int_x86_sse2_cmp_sd VR128:$src1,
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