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| author | Cameron Zwarich <zwarich@apple.com> | 2011-05-19 02:18:27 +0000 |
|---|---|---|
| committer | Cameron Zwarich <zwarich@apple.com> | 2011-05-19 02:18:27 +0000 |
| commit | 00b780e2805a9a93f13bd873b3386d5f1b11f007 (patch) | |
| tree | cd9304e99cf2808fa1da9e71093643c3cca5aa8c /llvm/lib/Target | |
| parent | fe5795a1f63fc073cbb83594b1d04cff975d198e (diff) | |
| download | bcm5719-llvm-00b780e2805a9a93f13bd873b3386d5f1b11f007.tar.gz bcm5719-llvm-00b780e2805a9a93f13bd873b3386d5f1b11f007.zip | |
Correctly constrain a register class when computing frame offsets, as the Thumb2
add instruction takes an rGPR. This fixes the last of PR8825.
llvm-svn: 131619
Diffstat (limited to 'llvm/lib/Target')
| -rw-r--r-- | llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp index ea1f08a7da8..9a18a961aaa 100644 --- a/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp +++ b/llvm/lib/Target/ARM/ARMBaseRegisterInfo.cpp @@ -1111,6 +1111,10 @@ materializeFrameBaseRegister(MachineBasicBlock *MBB, if (Ins != MBB->end()) DL = Ins->getDebugLoc(); + const TargetInstrDesc &TID = TII.get(ADDriOpc); + MachineRegisterInfo &MRI = MBB->getParent()->getRegInfo(); + MRI.constrainRegClass(BaseReg, TID.OpInfo[0].getRegClass(this)); + MachineInstrBuilder MIB = BuildMI(*MBB, Ins, DL, TII.get(ADDriOpc), BaseReg) .addFrameIndex(FrameIdx).addImm(Offset); |
