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authorRobert Lytton <robert@xmos.com>2013-09-18 12:43:35 +0000
committerRobert Lytton <robert@xmos.com>2013-09-18 12:43:35 +0000
commitf637e2cb2344415b12ad943d29b0fd78abde2b42 (patch)
treef4dc1f98722d6a9a1df4998502f7d5b4e8e4b3cd /llvm/lib/Target/XCore/XCoreTargetMachine.cpp
parentdcab7fbb830ffc06cfa088a76dcfc3b2b2b869e4 (diff)
downloadbcm5719-llvm-f637e2cb2344415b12ad943d29b0fd78abde2b42.tar.gz
bcm5719-llvm-f637e2cb2344415b12ad943d29b0fd78abde2b42.zip
Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers.
XCore target: Add XCoreTargetTransformInfo This is where getNumberOfRegisters() resides, which in turn returns the number of vector registers (=0). llvm-svn: 190936
Diffstat (limited to 'llvm/lib/Target/XCore/XCoreTargetMachine.cpp')
-rw-r--r--llvm/lib/Target/XCore/XCoreTargetMachine.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
index 3ef1520c71a..9ae0b860dff 100644
--- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
+++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp
@@ -70,3 +70,11 @@ bool XCorePassConfig::addInstSelector() {
extern "C" void LLVMInitializeXCoreTarget() {
RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget);
}
+
+void XCoreTargetMachine::addAnalysisPasses(PassManagerBase &PM) {
+ // Add first the target-independent BasicTTI pass, then our XCore pass. This
+ // allows the XCore pass to delegate to the target independent layer when
+ // appropriate.
+ PM.add(createBasicTargetTransformInfoPass(this));
+ PM.add(createXCoreTargetTransformInfoPass(this));
+}
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