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| author | Robert Lytton <robert@xmos.com> | 2013-09-18 12:43:35 +0000 |
|---|---|---|
| committer | Robert Lytton <robert@xmos.com> | 2013-09-18 12:43:35 +0000 |
| commit | f637e2cb2344415b12ad943d29b0fd78abde2b42 (patch) | |
| tree | f4dc1f98722d6a9a1df4998502f7d5b4e8e4b3cd /llvm/lib | |
| parent | dcab7fbb830ffc06cfa088a76dcfc3b2b2b869e4 (diff) | |
| download | bcm5719-llvm-f637e2cb2344415b12ad943d29b0fd78abde2b42.tar.gz bcm5719-llvm-f637e2cb2344415b12ad943d29b0fd78abde2b42.zip | |
Prevent LoopVectorizer and SLPVectorizer running if the target has no vector registers.
XCore target: Add XCoreTargetTransformInfo
This is where getNumberOfRegisters() resides, which in turn returns the
number of vector registers (=0).
llvm-svn: 190936
Diffstat (limited to 'llvm/lib')
| -rw-r--r-- | llvm/lib/Target/XCore/XCore.h | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreTargetMachine.cpp | 8 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreTargetMachine.h | 2 | ||||
| -rw-r--r-- | llvm/lib/Target/XCore/XCoreTargetTransformInfo.cpp | 85 | ||||
| -rw-r--r-- | llvm/lib/Transforms/Vectorize/LoopVectorize.cpp | 5 | ||||
| -rw-r--r-- | llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp | 5 |
6 files changed, 107 insertions, 0 deletions
diff --git a/llvm/lib/Target/XCore/XCore.h b/llvm/lib/Target/XCore/XCore.h index 2f375fc952c..73c310be034 100644 --- a/llvm/lib/Target/XCore/XCore.h +++ b/llvm/lib/Target/XCore/XCore.h @@ -31,6 +31,8 @@ namespace llvm { CodeGenOpt::Level OptLevel); ModulePass *createXCoreLowerThreadLocalPass(); + ImmutablePass *createXCoreTargetTransformInfoPass(const XCoreTargetMachine *TM); + } // end namespace llvm; #endif diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp index 3ef1520c71a..9ae0b860dff 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.cpp +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.cpp @@ -70,3 +70,11 @@ bool XCorePassConfig::addInstSelector() { extern "C" void LLVMInitializeXCoreTarget() { RegisterTargetMachine<XCoreTargetMachine> X(TheXCoreTarget); } + +void XCoreTargetMachine::addAnalysisPasses(PassManagerBase &PM) { + // Add first the target-independent BasicTTI pass, then our XCore pass. This + // allows the XCore pass to delegate to the target independent layer when + // appropriate. + PM.add(createBasicTargetTransformInfoPass(this)); + PM.add(createXCoreTargetTransformInfoPass(this)); +} diff --git a/llvm/lib/Target/XCore/XCoreTargetMachine.h b/llvm/lib/Target/XCore/XCoreTargetMachine.h index eb9a1aa420e..a19a67727f2 100644 --- a/llvm/lib/Target/XCore/XCoreTargetMachine.h +++ b/llvm/lib/Target/XCore/XCoreTargetMachine.h @@ -57,6 +57,8 @@ public: // Pass Pipeline Configuration virtual TargetPassConfig *createPassConfig(PassManagerBase &PM); + + virtual void addAnalysisPasses(PassManagerBase &PM); }; } // end namespace llvm diff --git a/llvm/lib/Target/XCore/XCoreTargetTransformInfo.cpp b/llvm/lib/Target/XCore/XCoreTargetTransformInfo.cpp new file mode 100644 index 00000000000..48621388348 --- /dev/null +++ b/llvm/lib/Target/XCore/XCoreTargetTransformInfo.cpp @@ -0,0 +1,85 @@ +//===-- XCoreTargetTransformInfo.cpp - XCore specific TTI pass ----------------===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +/// \file +/// This file implements a TargetTransformInfo analysis pass specific to the +/// XCore target machine. It uses the target's detailed information to provide +/// more precise answers to certain TTI queries, while letting the target +/// independent and default TTI implementations handle the rest. +/// +//===----------------------------------------------------------------------===// + +#define DEBUG_TYPE "xcoretti" +#include "XCore.h" +#include "llvm/Analysis/TargetTransformInfo.h" +#include "llvm/Support/Debug.h" +#include "llvm/Target/TargetLowering.h" +#include "llvm/Target/CostTable.h" +using namespace llvm; + +// Declare the pass initialization routine locally as target-specific passes +// don't havve a target-wide initialization entry point, and so we rely on the +// pass constructor initialization. +namespace llvm { +void initializeXCoreTTIPass(PassRegistry &); +} + +namespace { + +class XCoreTTI : public ImmutablePass, public TargetTransformInfo { + const XCoreTargetMachine *TM; + +public: + XCoreTTI() : ImmutablePass(ID), TM(0) { + llvm_unreachable("This pass cannot be directly constructed"); + } + + XCoreTTI(const XCoreTargetMachine *TM) + : ImmutablePass(ID), TM(TM) { + initializeXCoreTTIPass(*PassRegistry::getPassRegistry()); + } + + virtual void initializePass() { + pushTTIStack(this); + } + + virtual void finalizePass() { + popTTIStack(); + } + + virtual void getAnalysisUsage(AnalysisUsage &AU) const { + TargetTransformInfo::getAnalysisUsage(AU); + } + + static char ID; + + virtual void *getAdjustedAnalysisPointer(const void *ID) { + if (ID == &TargetTransformInfo::ID) + return (TargetTransformInfo*)this; + return this; + } + + unsigned getNumberOfRegisters(bool Vector) const { + if (Vector) { + return 0; + } + return 12; + } +}; + +} // end anonymous namespace + +INITIALIZE_AG_PASS(XCoreTTI, TargetTransformInfo, "xcoretti", + "XCore Target Transform Info", true, true, false) +char XCoreTTI::ID = 0; + + +ImmutablePass * +llvm::createXCoreTargetTransformInfoPass(const XCoreTargetMachine *TM) { + return new XCoreTTI(TM); +} diff --git a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp index 1d82c7b8f54..30908c8ebf3 100644 --- a/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp +++ b/llvm/lib/Transforms/Vectorize/LoopVectorize.cpp @@ -909,6 +909,11 @@ struct LoopVectorize : public LoopPass { DT = &getAnalysis<DominatorTree>(); TLI = getAnalysisIfAvailable<TargetLibraryInfo>(); + // If the target claims to have no vector registers don't attempt + // vectorization. + if (!TTI->getNumberOfRegisters(true)) + return false; + if (DL == NULL) { DEBUG(dbgs() << "LV: Not vectorizing because of missing data layout"); return false; diff --git a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp index b287ca7c8d5..cd3f723cd3e 100644 --- a/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp +++ b/llvm/lib/Transforms/Vectorize/SLPVectorizer.cpp @@ -1572,6 +1572,11 @@ struct SLPVectorizer : public FunctionPass { StoreRefs.clear(); bool Changed = false; + // If the target claims to have no vector registers don't attempt + // vectorization. + if (!TTI->getNumberOfRegisters(true)) + return false; + // Must have DataLayout. We can't require it because some tests run w/o // triple. if (!DL) |

