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| author | Reid Kleckner <reid@kleckner.net> | 2014-08-29 21:42:21 +0000 |
|---|---|---|
| committer | Reid Kleckner <reid@kleckner.net> | 2014-08-29 21:42:21 +0000 |
| commit | dccd0cbec3d6eb835362d921c6bd33a5cc0a920f (patch) | |
| tree | d7621c55c439da3cc1574aa89303ba25135cba35 /llvm/lib/Target/X86 | |
| parent | 16e5541211b527b4403f471834e890c7ce82a49d (diff) | |
| download | bcm5719-llvm-dccd0cbec3d6eb835362d921c6bd33a5cc0a920f.tar.gz bcm5719-llvm-dccd0cbec3d6eb835362d921c6bd33a5cc0a920f.zip | |
Add a const and munge some comments
llvm-svn: 216781
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 8 |
1 files changed, 5 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index f52e498e562..b95d31e5a26 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -2326,6 +2326,7 @@ X86TargetLowering::LowerMemArgument(SDValue Chain, } } +// FIXME: Get this from tablegen. static ArrayRef<MCPhysReg> get64BitArgumentGPRs(CallingConv::ID CallConv, const X86Subtarget *Subtarget) { assert(Subtarget->is64Bit()); @@ -2343,6 +2344,7 @@ static ArrayRef<MCPhysReg> get64BitArgumentGPRs(CallingConv::ID CallConv, return GPR64ArgRegs64Bit; } +// FIXME: Get this from tablegen. static ArrayRef<MCPhysReg> get64BitArgumentXMMs(MachineFunction &MF, CallingConv::ID CallConv, const X86Subtarget *Subtarget) { @@ -2351,6 +2353,7 @@ static ArrayRef<MCPhysReg> get64BitArgumentXMMs(MachineFunction &MF, // The XMM registers which might contain var arg parameters are shadowed // in their paired GPR. So we only need to save the GPR to their home // slots. + // TODO: __vectorcall will change this. return None; } @@ -2613,13 +2616,12 @@ X86TargetLowering::LowerFormalArguments(SDValue Chain, if (!MemOps.empty()) Chain = DAG.getNode(ISD::TokenFactor, dl, MVT::Other, MemOps); } else { - // TODO: Save virtual registers away some where so we can do - // getCopyFromReg in the musttail call lowering bb. + // Add all GPRs, al, and XMMs to the list of forwards. We will add then + // to the liveout set on a musttail call. assert(MFI->hasMustTailInVarArgFunc()); auto &Forwards = FuncInfo->getForwardedMustTailRegParms(); typedef X86MachineFunctionInfo::Forward Forward; - // Add all GPRs, al, and XMMs to the list of forwards. for (unsigned I = 0, E = LiveGPRs.size(); I != E; ++I) { unsigned VReg = MF.getRegInfo().createVirtualRegister(&X86::GR64RegClass); |

