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| author | Craig Topper <craig.topper@intel.com> | 2017-10-08 08:50:59 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-10-08 08:50:59 +0000 |
| commit | bbca2f2978e53e36875fc41264e7c4ee782624b1 (patch) | |
| tree | a00e82d0829245c74d7ca8ae3c7231c39e85e780 /llvm/lib/Target/X86 | |
| parent | 5fc6dc58d768e1c571bd83112cda0fe2d11c8690 (diff) | |
| download | bcm5719-llvm-bbca2f2978e53e36875fc41264e7c4ee782624b1.tar.gz bcm5719-llvm-bbca2f2978e53e36875fc41264e7c4ee782624b1.zip | |
[X86] Stop LowerSIGN_EXTEND_AVX512 from creating v8i16/v16i16/v16i8 vselects with a v8i1/v16i1 condition when BWI is not available.
Some of the tests in vector-shuffle-v1.ll would get into an infinite loop without this.
llvm-svn: 315172
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 28a30d7824a..afd8a498445 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -18028,8 +18028,13 @@ static SDValue LowerSIGN_EXTEND_AVX512(SDValue Op, return SDValue(); MVT ExtVT = VT; - if (!VT.is512BitVector() && !Subtarget.hasVLX()) + if (!VT.is512BitVector() && !Subtarget.hasVLX()) { ExtVT = MVT::getVectorVT(MVT::getIntegerVT(512/NumElts), NumElts); + } else if (VTElt == MVT::i16 || VTElt == MVT::i8) { + // If we don't have BWI support we need to extend 8/16-bit to 32-bit. + // Otherwise we end up with vselects we can't handle. + ExtVT = MVT::getVectorVT(MVT::i32, NumElts); + } SDValue V; if (Subtarget.hasDQI()) { |
