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authorChris Lattner <sabre@nondot.org>2007-12-30 23:10:15 +0000
committerChris Lattner <sabre@nondot.org>2007-12-30 23:10:15 +0000
commita5bb370aa42a238e07ee22adcdc792df292b1ab0 (patch)
tree9f8730cc8a4c235fb5a9a317760ca7475434d289 /llvm/lib/Target/X86
parent1862b6daa08524be6289240cf7049484b0365e39 (diff)
downloadbcm5719-llvm-a5bb370aa42a238e07ee22adcdc792df292b1ab0.tar.gz
bcm5719-llvm-a5bb370aa42a238e07ee22adcdc792df292b1ab0.zip
Add new shorter predicates for testing machine operands for various types:
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on switching everything over, so new clients should just start using the shorter names. Remove old long accessors, switching everything over to use the short accessor: getMachineBasicBlock() -> getMBB(), getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc. llvm-svn: 45464
Diffstat (limited to 'llvm/lib/Target/X86')
-rw-r--r--llvm/lib/Target/X86/X86ATTAsmPrinter.cpp6
-rw-r--r--llvm/lib/Target/X86/X86CodeEmitter.cpp22
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp2
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp22
-rw-r--r--llvm/lib/Target/X86/X86IntelAsmPrinter.cpp6
-rw-r--r--llvm/lib/Target/X86/X86RegisterInfo.cpp8
6 files changed, 33 insertions, 33 deletions
diff --git a/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp b/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
index 34ff9c18a87..d2112b48d98 100644
--- a/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -232,13 +232,13 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
O << MO.getImm();
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_JumpTableIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << '$';
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber() << "_"
- << MO.getJumpTableIndex();
+ << MO.getIndex();
if (TM.getRelocationModel() == Reloc::PIC_) {
if (Subtarget->isPICStyleStub())
@@ -256,7 +256,7 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << '$';
O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber() << "_"
- << MO.getConstantPoolIndex();
+ << MO.getIndex();
if (TM.getRelocationModel() == Reloc::PIC_) {
if (Subtarget->isPICStyleStub())
diff --git a/llvm/lib/Target/X86/X86CodeEmitter.cpp b/llvm/lib/Target/X86/X86CodeEmitter.cpp
index 8654476d96e..7e6fb2a62f4 100644
--- a/llvm/lib/Target/X86/X86CodeEmitter.cpp
+++ b/llvm/lib/Target/X86/X86CodeEmitter.cpp
@@ -247,11 +247,11 @@ void Emitter::emitDisplacementField(const MachineOperand *RelocOp,
PCAdj, false, IsPIC);
} else if (RelocOp->isConstantPoolIndex()) {
// Must be in 64-bit mode.
- emitConstPoolAddress(RelocOp->getConstantPoolIndex(), X86::reloc_pcrel_word,
+ emitConstPoolAddress(RelocOp->getIndex(), X86::reloc_pcrel_word,
RelocOp->getOffset(), PCAdj, IsPIC);
} else if (RelocOp->isJumpTableIndex()) {
// Must be in 64-bit mode.
- emitJumpTableAddress(RelocOp->getJumpTableIndex(), X86::reloc_pcrel_word,
+ emitJumpTableAddress(RelocOp->getIndex(), X86::reloc_pcrel_word,
PCAdj, IsPIC);
} else {
assert(0 && "Unknown value to relocate!");
@@ -272,14 +272,14 @@ void Emitter::emitMemModRMByte(const MachineInstr &MI,
if (Is64BitMode) {
DispForReloc = &Op3;
} else {
- DispVal += MCE.getConstantPoolEntryAddress(Op3.getConstantPoolIndex());
+ DispVal += MCE.getConstantPoolEntryAddress(Op3.getIndex());
DispVal += Op3.getOffset();
}
} else if (Op3.isJumpTableIndex()) {
if (Is64BitMode) {
DispForReloc = &Op3;
} else {
- DispVal += MCE.getJumpTableEntryAddress(Op3.getJumpTableIndex());
+ DispVal += MCE.getJumpTableEntryAddress(Op3.getIndex());
}
} else {
DispVal = Op3.getImm();
@@ -601,7 +601,7 @@ void Emitter::emitInstruction(const MachineInstr &MI) {
if (CurOp != NumOps) {
const MachineOperand &MO = MI.getOperand(CurOp++);
if (MO.isMachineBasicBlock()) {
- emitPCRelativeBlockAddress(MO.getMachineBasicBlock());
+ emitPCRelativeBlockAddress(MO.getMBB());
} else if (MO.isGlobalAddress()) {
bool NeedStub = Is64BitMode ||
Opcode == X86::TAILJMPd ||
@@ -642,9 +642,9 @@ void Emitter::emitInstruction(const MachineInstr &MI) {
else if (MO1.isExternalSymbol())
emitExternalSymbolAddress(MO1.getSymbolName(), rt, IsPIC);
else if (MO1.isConstantPoolIndex())
- emitConstPoolAddress(MO1.getConstantPoolIndex(), rt, IsPIC);
+ emitConstPoolAddress(MO1.getIndex(), rt, IsPIC);
else if (MO1.isJumpTableIndex())
- emitJumpTableAddress(MO1.getJumpTableIndex(), rt, IsPIC);
+ emitJumpTableAddress(MO1.getIndex(), rt, IsPIC);
}
}
break;
@@ -711,9 +711,9 @@ void Emitter::emitInstruction(const MachineInstr &MI) {
else if (MO1.isExternalSymbol())
emitExternalSymbolAddress(MO1.getSymbolName(), rt, IsPIC);
else if (MO1.isConstantPoolIndex())
- emitConstPoolAddress(MO1.getConstantPoolIndex(), rt, IsPIC);
+ emitConstPoolAddress(MO1.getIndex(), rt, IsPIC);
else if (MO1.isJumpTableIndex())
- emitJumpTableAddress(MO1.getJumpTableIndex(), rt, IsPIC);
+ emitJumpTableAddress(MO1.getIndex(), rt, IsPIC);
}
}
break;
@@ -745,9 +745,9 @@ void Emitter::emitInstruction(const MachineInstr &MI) {
else if (MO.isExternalSymbol())
emitExternalSymbolAddress(MO.getSymbolName(), rt, IsPIC);
else if (MO.isConstantPoolIndex())
- emitConstPoolAddress(MO.getConstantPoolIndex(), rt, IsPIC);
+ emitConstPoolAddress(MO.getIndex(), rt, IsPIC);
else if (MO.isJumpTableIndex())
- emitJumpTableAddress(MO.getJumpTableIndex(), rt, IsPIC);
+ emitJumpTableAddress(MO.getIndex(), rt, IsPIC);
}
}
break;
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index efb73072787..4d17f55a950 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -5838,7 +5838,7 @@ X86TargetLowering::InsertAtEndOfBasicBlock(MachineInstr *MI,
AM.Base.Reg = Op.getReg();
} else {
AM.BaseType = X86AddressMode::FrameIndexBase;
- AM.Base.FrameIndex = Op.getFrameIndex();
+ AM.Base.FrameIndex = Op.getIndex();
}
Op = MI->getOperand(1);
if (Op.isImmediate())
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 70b12641d63..3403f1c4d0c 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -71,12 +71,12 @@ unsigned X86InstrInfo::isLoadFromStackSlot(MachineInstr *MI,
case X86::MOVAPDrm:
case X86::MMX_MOVD64rm:
case X86::MMX_MOVQ64rm:
- if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
- MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() &&
+ if (MI->getOperand(1).isFI() && MI->getOperand(2).isImm() &&
+ MI->getOperand(3).isReg() && MI->getOperand(4).isImm() &&
MI->getOperand(2).getImm() == 1 &&
MI->getOperand(3).getReg() == 0 &&
MI->getOperand(4).getImm() == 0) {
- FrameIndex = MI->getOperand(1).getFrameIndex();
+ FrameIndex = MI->getOperand(1).getIndex();
return MI->getOperand(0).getReg();
}
break;
@@ -102,12 +102,12 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI,
case X86::MMX_MOVD64mr:
case X86::MMX_MOVQ64mr:
case X86::MMX_MOVNTQmr:
- if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() &&
- MI->getOperand(2).isRegister() && MI->getOperand(3).isImmediate() &&
+ if (MI->getOperand(0).isFI() && MI->getOperand(1).isImm() &&
+ MI->getOperand(2).isReg() && MI->getOperand(3).isImm() &&
MI->getOperand(1).getImm() == 1 &&
MI->getOperand(2).getReg() == 0 &&
MI->getOperand(3).getImm() == 0) {
- FrameIndex = MI->getOperand(0).getFrameIndex();
+ FrameIndex = MI->getOperand(0).getIndex();
return MI->getOperand(4).getReg();
}
break;
@@ -689,7 +689,7 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
// it's an unconditional, conditional, or indirect branch.
if (LastInst->getOpcode() == X86::JMP) {
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
return false;
}
X86::CondCode BranchCode = GetCondFromBranchOpc(LastInst->getOpcode());
@@ -697,7 +697,7 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
return true; // Can't handle indirect branch.
// Otherwise, block ends with fall-through condbranch.
- TBB = LastInst->getOperand(0).getMachineBasicBlock();
+ TBB = LastInst->getOperand(0).getMBB();
Cond.push_back(MachineOperand::CreateImm(BranchCode));
return false;
}
@@ -713,9 +713,9 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
// If the block ends with X86::JMP and a conditional branch, handle it.
X86::CondCode BranchCode = GetCondFromBranchOpc(SecondLastInst->getOpcode());
if (BranchCode != X86::COND_INVALID && LastInst->getOpcode() == X86::JMP) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
Cond.push_back(MachineOperand::CreateImm(BranchCode));
- FBB = LastInst->getOperand(0).getMachineBasicBlock();
+ FBB = LastInst->getOperand(0).getMBB();
return false;
}
@@ -723,7 +723,7 @@ bool X86InstrInfo::AnalyzeBranch(MachineBasicBlock &MBB,
// executed, so remove it.
if (SecondLastInst->getOpcode() == X86::JMP &&
LastInst->getOpcode() == X86::JMP) {
- TBB = SecondLastInst->getOperand(0).getMachineBasicBlock();
+ TBB = SecondLastInst->getOperand(0).getMBB();
I = LastInst;
I->eraseFromParent();
return false;
diff --git a/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp b/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
index 8dae321ec8b..39fc7a02f25 100644
--- a/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -135,20 +135,20 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
O << MO.getImm();
return;
case MachineOperand::MO_MachineBasicBlock:
- printBasicBlockLabel(MO.getMachineBasicBlock());
+ printBasicBlockLabel(MO.getMBB());
return;
case MachineOperand::MO_JumpTableIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << "OFFSET ";
O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
- << "_" << MO.getJumpTableIndex();
+ << "_" << MO.getIndex();
return;
}
case MachineOperand::MO_ConstantPoolIndex: {
bool isMemOp = Modifier && !strcmp(Modifier, "mem");
if (!isMemOp) O << "OFFSET ";
O << "[" << TAI->getPrivateGlobalPrefix() << "CPI"
- << getFunctionNumber() << "_" << MO.getConstantPoolIndex();
+ << getFunctionNumber() << "_" << MO.getIndex();
int Offset = MO.getOffset();
if (Offset > 0)
O << " + " << Offset;
diff --git a/llvm/lib/Target/X86/X86RegisterInfo.cpp b/llvm/lib/Target/X86/X86RegisterInfo.cpp
index e57bc03426f..07c25914a23 100644
--- a/llvm/lib/Target/X86/X86RegisterInfo.cpp
+++ b/llvm/lib/Target/X86/X86RegisterInfo.cpp
@@ -781,13 +781,13 @@ static const MachineInstrBuilder &X86InstrAddOperand(MachineInstrBuilder &MIB,
else if (MO.isImmediate())
MIB = MIB.addImm(MO.getImm());
else if (MO.isFrameIndex())
- MIB = MIB.addFrameIndex(MO.getFrameIndex());
+ MIB = MIB.addFrameIndex(MO.getIndex());
else if (MO.isGlobalAddress())
MIB = MIB.addGlobalAddress(MO.getGlobal(), MO.getOffset());
else if (MO.isConstantPoolIndex())
- MIB = MIB.addConstantPoolIndex(MO.getConstantPoolIndex(), MO.getOffset());
+ MIB = MIB.addConstantPoolIndex(MO.getIndex(), MO.getOffset());
else if (MO.isJumpTableIndex())
- MIB = MIB.addJumpTableIndex(MO.getJumpTableIndex());
+ MIB = MIB.addJumpTableIndex(MO.getIndex());
else if (MO.isExternalSymbol())
MIB = MIB.addExternalSymbol(MO.getSymbolName());
else
@@ -1611,7 +1611,7 @@ void X86RegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
}
- int FrameIndex = MI.getOperand(i).getFrameIndex();
+ int FrameIndex = MI.getOperand(i).getIndex();
// This must be part of a four operand memory reference. Replace the
// FrameIndex with base register with EBP. Add an offset to the offset.
MI.getOperand(i).ChangeToRegister(hasFP(MF) ? FramePtr : StackPtr, false);
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