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| author | Craig Topper <craig.topper@intel.com> | 2019-09-05 17:24:15 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2019-09-05 17:24:15 +0000 |
| commit | a5508163ada529dfef23b22c75a5cb1ea84f438b (patch) | |
| tree | ff33132aca240508882e13f2aef7b9358a77c3c5 /llvm/lib/Target/X86 | |
| parent | ce7a37291d41dd44fe4e99781749a933aa07a7c0 (diff) | |
| download | bcm5719-llvm-a5508163ada529dfef23b22c75a5cb1ea84f438b.tar.gz bcm5719-llvm-a5508163ada529dfef23b22c75a5cb1ea84f438b.zip | |
[X86] Fix stale comment. NFC
We aren't checking for a concat here. We're just always splitting
256-bit stores.
llvm-svn: 371092
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 844a29c01c1..66117cbdb53 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -40536,8 +40536,8 @@ static SDValue combineStore(SDNode *N, SelectionDAG &DAG, St->getMemOperand()->getFlags()); } - // If we are saving a concatenation of two XMM registers and 32-byte stores - // are slow, such as on Sandy Bridge, perform two 16-byte stores. + // If we are saving a 32-byte vector and 32-byte stores are slow, such as on + // Sandy Bridge, perform two 16-byte stores. bool Fast; if (VT.is256BitVector() && StVT == VT && TLI.allowsMemoryAccess(*DAG.getContext(), DAG.getDataLayout(), VT, |
