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authorChad Rosier <mcrosier@apple.com>2012-07-11 19:58:38 +0000
committerChad Rosier <mcrosier@apple.com>2012-07-11 19:58:38 +0000
commit8446ede0236cb45748aeacac4ffdbb32d1510f10 (patch)
tree7ac355ce86eb0e682918ddd36c607b8e811c1708 /llvm/lib/Target/X86
parentb13eb8dca5df6424abeedfdbfd1a96fbb7a97565 (diff)
downloadbcm5719-llvm-8446ede0236cb45748aeacac4ffdbb32d1510f10.tar.gz
bcm5719-llvm-8446ede0236cb45748aeacac4ffdbb32d1510f10.zip
[x86 fast-isel] Per discussion with Eric, add all cases to switch with verbose
comments. llvm-svn: 160069
Diffstat (limited to 'llvm/lib/Target/X86')
-rw-r--r--llvm/lib/Target/X86/X86FastISel.cpp9
1 files changed, 8 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86FastISel.cpp b/llvm/lib/Target/X86/X86FastISel.cpp
index b410a6743dd..d82b40d69fb 100644
--- a/llvm/lib/Target/X86/X86FastISel.cpp
+++ b/llvm/lib/Target/X86/X86FastISel.cpp
@@ -1693,7 +1693,6 @@ bool X86FastISel::DoSelectCall(const Instruction *I, const char *MemIntName) {
// Promote the value if needed.
switch (VA.getLocInfo()) {
- default: return false;
case CCValAssign::Full: break;
case CCValAssign::SExt: {
assert(VA.getLocVT().isInteger() && !VA.getLocVT().isVector() &&
@@ -1737,6 +1736,14 @@ bool X86FastISel::DoSelectCall(const Instruction *I, const char *MemIntName) {
ArgVT = VA.getLocVT();
break;
}
+ case CCValAssign::VExt:
+ // VExt has not been implemented, so this should be impossible to reach
+ // for now. However, fallback to Selection DAG isel once implemented.
+ return false;
+ case CCValAssign::Indirect:
+ // FIXME: Indirect doesn't need extending, but fast-isel doesn't fully
+ // support this.
+ return false;
}
if (VA.isRegLoc()) {
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