Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm

llvm-svn: 45453

4 files changed, 22 insertions, 22 deletions

diff --git a/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp b/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
index a28aecfeafa..34ff9c18a87 100644
--- a/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86ATTAsmPrinter.cpp
@@ -229,7 +229,7 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
     if (!Modifier ||
         (strcmp(Modifier, "debug") && strcmp(Modifier, "mem")))
       O << '$';
-    O << MO.getImmedValue();
+    O << MO.getImm();
     return;
   case MachineOperand::MO_MachineBasicBlock:
     printBasicBlockLabel(MO.getMachineBasicBlock());
@@ -440,7 +440,7 @@ void X86ATTAsmPrinter::printOperand(const MachineInstr *MI, unsigned OpNo,
 }
 
 void X86ATTAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
-  unsigned char value = MI->getOperand(Op).getImmedValue();
+  unsigned char value = MI->getOperand(Op).getImm();
   assert(value <= 7 && "Invalid ssecc argument!");
   switch (value) {
   case 0: O << "eq"; break;
@@ -467,13 +467,13 @@ void X86ATTAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
       DispSpec.isJumpTableIndex()) {
     printOperand(MI, Op+3, "mem", NotRIPRel);
   } else {
-    int DispVal = DispSpec.getImmedValue();
+    int DispVal = DispSpec.getImm();
     if (DispVal || (!IndexReg.getReg() && !BaseReg.getReg()))
       O << DispVal;
   }
 
   if (IndexReg.getReg() || BaseReg.getReg()) {
-    unsigned ScaleVal = MI->getOperand(Op+1).getImmedValue();
+    unsigned ScaleVal = MI->getOperand(Op+1).getImm();
     unsigned BaseRegOperand = 0, IndexRegOperand = 2;
       
     // There are cases where we can end up with ESP/RSP in the indexreg slot.
diff --git a/llvm/lib/Target/X86/X86AsmPrinter.h b/llvm/lib/Target/X86/X86AsmPrinter.h
index 234fc538d10..6c47e0c27e8 100644
--- a/llvm/lib/Target/X86/X86AsmPrinter.h
+++ b/llvm/lib/Target/X86/X86AsmPrinter.h
@@ -77,8 +77,8 @@ struct VISIBILITY_HIDDEN X86SharedAsmPrinter : public AsmPrinter {
 
   inline static bool isScale(const MachineOperand &MO) {
     return MO.isImmediate() &&
-          (MO.getImmedValue() == 1 || MO.getImmedValue() == 2 ||
-          MO.getImmedValue() == 4 || MO.getImmedValue() == 8);
+          (MO.getImm() == 1 || MO.getImm() == 2 ||
+           MO.getImm() == 4 || MO.getImm() == 8);
   }
 
   inline static bool isMem(const MachineInstr *MI, unsigned Op) {
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 4f7d51e1634..70b12641d63 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -73,9 +73,9 @@ unsigned X86InstrInfo::isLoadFromStackSlot(MachineInstr *MI,
   case X86::MMX_MOVQ64rm:
     if (MI->getOperand(1).isFrameIndex() && MI->getOperand(2).isImmediate() &&
         MI->getOperand(3).isRegister() && MI->getOperand(4).isImmediate() &&
-        MI->getOperand(2).getImmedValue() == 1 &&
+        MI->getOperand(2).getImm() == 1 &&
         MI->getOperand(3).getReg() == 0 &&
-        MI->getOperand(4).getImmedValue() == 0) {
+        MI->getOperand(4).getImm() == 0) {
       FrameIndex = MI->getOperand(1).getFrameIndex();
       return MI->getOperand(0).getReg();
     }
@@ -104,9 +104,9 @@ unsigned X86InstrInfo::isStoreToStackSlot(MachineInstr *MI,
   case X86::MMX_MOVNTQmr:
     if (MI->getOperand(0).isFrameIndex() && MI->getOperand(1).isImmediate() &&
         MI->getOperand(2).isRegister() && MI->getOperand(3).isImmediate() &&
-        MI->getOperand(1).getImmedValue() == 1 &&
+        MI->getOperand(1).getImm() == 1 &&
         MI->getOperand(2).getReg() == 0 &&
-        MI->getOperand(3).getImmedValue() == 0) {
+        MI->getOperand(3).getImm() == 0) {
       FrameIndex = MI->getOperand(0).getFrameIndex();
       return MI->getOperand(4).getReg();
     }
@@ -136,7 +136,7 @@ bool X86InstrInfo::isReallyTriviallyReMaterializable(MachineInstr *MI) const {
     return MI->getOperand(1).isRegister() && MI->getOperand(2).isImmediate() &&
            MI->getOperand(3).isRegister() && MI->getOperand(4).isConstantPoolIndex() &&
            MI->getOperand(1).getReg() == 0 &&
-           MI->getOperand(2).getImmedValue() == 1 &&
+           MI->getOperand(2).getImm() == 1 &&
            MI->getOperand(3).getReg() == 0;
   }
   // All other instructions marked M_REMATERIALIZABLE are always trivially
@@ -194,7 +194,7 @@ bool X86InstrInfo::isReallySideEffectFree(MachineInstr *MI) const {
           MI->getOperand(2).isImmediate() &&
           MI->getOperand(3).isRegister() &&
           MI->getOperand(4).isGlobalAddress() &&
-          MI->getOperand(2).getImmedValue() == 1 &&
+          MI->getOperand(2).getImm() == 1 &&
           MI->getOperand(3).getReg() == 0)
         return true;
     }
@@ -217,7 +217,7 @@ bool X86InstrInfo::isReallySideEffectFree(MachineInstr *MI) const {
            MI->getOperand(3).isRegister() &&
            MI->getOperand(4).isConstantPoolIndex() &&
            MI->getOperand(1).getReg() == 0 &&
-           MI->getOperand(2).getImmedValue() == 1 &&
+           MI->getOperand(2).getImm() == 1 &&
            MI->getOperand(3).getReg() == 0;
   }
 
@@ -404,7 +404,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
       assert(MI->getNumOperands() >= 3 && "Unknown add instruction!");
       if (MI->getOperand(2).isImmediate())
         NewMI = addRegOffset(BuildMI(get(X86::LEA64r), Dest), Src,
-                             MI->getOperand(2).getImmedValue());
+                             MI->getOperand(2).getImm());
       break;
     case X86::ADD32ri:
     case X86::ADD32ri8:
@@ -412,7 +412,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
       if (MI->getOperand(2).isImmediate()) {
         unsigned Opc = is64Bit ? X86::LEA64_32r : X86::LEA32r;
         NewMI = addRegOffset(BuildMI(get(Opc), Dest), Src,
-                             MI->getOperand(2).getImmedValue());
+                             MI->getOperand(2).getImm());
       }
       break;
     case X86::ADD16ri:
@@ -421,7 +421,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
       assert(MI->getNumOperands() >= 3 && "Unknown add instruction!");
       if (MI->getOperand(2).isImmediate())
         NewMI = addRegOffset(BuildMI(get(X86::LEA16r), Dest), Src,
-                             MI->getOperand(2).getImmedValue());
+                             MI->getOperand(2).getImm());
       break;
     case X86::SHL16ri:
       if (DisableLEA16) return 0;
@@ -429,7 +429,7 @@ X86InstrInfo::convertToThreeAddress(MachineFunction::iterator &MFI,
     case X86::SHL64ri: {
       assert(MI->getNumOperands() >= 3 && MI->getOperand(2).isImmediate() &&
              "Unknown shl instruction!");
-      unsigned ShAmt = MI->getOperand(2).getImmedValue();
+      unsigned ShAmt = MI->getOperand(2).getImm();
       if (ShAmt == 1 || ShAmt == 2 || ShAmt == 3) {
         X86AddressMode AM;
         AM.Scale = 1 << ShAmt;
@@ -473,7 +473,7 @@ MachineInstr *X86InstrInfo::commuteInstruction(MachineInstr *MI) const {
     case X86::SHRD64rri8: Size = 64; Opc = X86::SHLD64rri8; break;
     case X86::SHLD64rri8: Size = 64; Opc = X86::SHRD64rri8; break;
     }
-    unsigned Amt = MI->getOperand(3).getImmedValue();
+    unsigned Amt = MI->getOperand(3).getImm();
     unsigned A = MI->getOperand(0).getReg();
     unsigned B = MI->getOperand(1).getReg();
     unsigned C = MI->getOperand(2).getReg();
diff --git a/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp b/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
index d784a5647e0..8dae321ec8b 100644
--- a/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
+++ b/llvm/lib/Target/X86/X86IntelAsmPrinter.cpp
@@ -99,7 +99,7 @@ bool X86IntelAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
 }
 
 void X86IntelAsmPrinter::printSSECC(const MachineInstr *MI, unsigned Op) {
-  unsigned char value = MI->getOperand(Op).getImmedValue();
+  unsigned char value = MI->getOperand(Op).getImm();
   assert(value <= 7 && "Invalid ssecc argument!");
   switch (value) {
   case 0: O << "eq"; break;
@@ -132,7 +132,7 @@ void X86IntelAsmPrinter::printOp(const MachineOperand &MO,
     return;
   }
   case MachineOperand::MO_Immediate:
-    O << MO.getImmedValue();
+    O << MO.getImm();
     return;
   case MachineOperand::MO_MachineBasicBlock:
     printBasicBlockLabel(MO.getMachineBasicBlock());
@@ -195,7 +195,7 @@ void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
   assert(isMem(MI, Op) && "Invalid memory reference!");
 
   const MachineOperand &BaseReg  = MI->getOperand(Op);
-  int ScaleVal                   = MI->getOperand(Op+1).getImmedValue();
+  int ScaleVal                   = MI->getOperand(Op+1).getImm();
   const MachineOperand &IndexReg = MI->getOperand(Op+2);
   const MachineOperand &DispSpec = MI->getOperand(Op+3);
 
@@ -220,7 +220,7 @@ void X86IntelAsmPrinter::printMemReference(const MachineInstr *MI, unsigned Op,
       O << " + ";
     printOp(DispSpec, "mem");
   } else {
-    int DispVal = DispSpec.getImmedValue();
+    int DispVal = DispSpec.getImm();
     if (DispVal || (!BaseReg.getReg() && !IndexReg.getReg())) {
       if (NeedPlus)
         if (DispVal > 0)