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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-02-28 11:39:52 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2019-02-28 11:39:52 +0000 |
| commit | 134bc19079f9645b697f966cf5422cac08f5a1fc (patch) | |
| tree | f7039c4d72fe09b40708bb1705cbee9cdde76bad /llvm/lib/Target/X86 | |
| parent | cf0ff638bce4219d408c3b0ac3aa9a21a77a9c16 (diff) | |
| download | bcm5719-llvm-134bc19079f9645b697f966cf5422cac08f5a1fc.tar.gz bcm5719-llvm-134bc19079f9645b697f966cf5422cac08f5a1fc.zip | |
[X86][AVX] Remove superfluous insert_subvector(zero, bitcast(x)) -> bitcast(insert_subvector(zero, x)) fold
This is caught by other existing bitcast folds.
llvm-svn: 355084
Diffstat (limited to 'llvm/lib/Target/X86')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 14 |
1 files changed, 0 insertions, 14 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 76f65782907..4c85267343a 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -41888,20 +41888,6 @@ static SDValue combineInsertSubvector(SDNode *N, SelectionDAG &DAG, getZeroVector(OpVT, Subtarget, DAG, dl), Ins.getOperand(1), N->getOperand(2)); } - - // If we're inserting a bitcast into zeros, rewrite the insert and move the - // bitcast to the other side. This helps with detecting zero extending - // during isel. - // TODO: Is this useful for other indices than 0? - if (!IsI1Vector && SubVec.getOpcode() == ISD::BITCAST && IdxVal == 0) { - MVT CastVT = SubVec.getOperand(0).getSimpleValueType(); - unsigned NumElems = OpVT.getSizeInBits() / CastVT.getScalarSizeInBits(); - MVT NewVT = MVT::getVectorVT(CastVT.getVectorElementType(), NumElems); - SDValue Insert = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, NewVT, - DAG.getBitcast(NewVT, Vec), - SubVec.getOperand(0), N->getOperand(2)); - return DAG.getBitcast(OpVT, Insert); - } } // Stop here if this is an i1 vector. |

