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author | Juergen Ributzka <juergen@apple.com> | 2014-03-20 19:55:52 +0000 |
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committer | Juergen Ributzka <juergen@apple.com> | 2014-03-20 19:55:52 +0000 |
commit | 6dab520c70a25f43f288f9875faf1e8df5a80c3a (patch) | |
tree | 58c38bc5fae1726785492a1b2ebda6fd74edad82 /llvm/lib/Target/X86/X86TargetTransformInfo.cpp | |
parent | b6118c5b1771d889d2bb6c63b45938769ac34755 (diff) | |
download | bcm5719-llvm-6dab520c70a25f43f288f9875faf1e8df5a80c3a.tar.gz bcm5719-llvm-6dab520c70a25f43f288f9875faf1e8df5a80c3a.zip |
[Constant Hoisting] Extend coverage of the constant hoisting pass.
This commit extends the coverage of the constant hoisting pass, adds additonal
debug output and updates the function names according to the style guide.
Related to <rdar://problem/16381500>
llvm-svn: 204389
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetTransformInfo.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 47 |
1 files changed, 32 insertions, 15 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index 1a0208c1a52..87a5dd6536b 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -103,9 +103,9 @@ public: unsigned getIntImmCost(const APInt &Imm, Type *Ty) const override; - unsigned getIntImmCost(unsigned Opcode, const APInt &Imm, + unsigned getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty) const override; - unsigned getIntImmCost(Intrinsic::ID IID, const APInt &Imm, + unsigned getIntImmCost(Intrinsic::ID IID, unsigned Idx, const APInt &Imm, Type *Ty) const override; /// @} @@ -776,6 +776,9 @@ unsigned X86TTI::getIntImmCost(const APInt &Imm, Type *Ty) const { if (BitSize == 0) return ~0U; + if (Imm == 0) + return TCC_Free; + if (Imm.getBitWidth() <= 64 && (isInt<32>(Imm.getSExtValue()) || isUInt<32>(Imm.getZExtValue()))) return TCC_Basic; @@ -783,7 +786,7 @@ unsigned X86TTI::getIntImmCost(const APInt &Imm, Type *Ty) const { return 2 * TCC_Basic; } -unsigned X86TTI::getIntImmCost(unsigned Opcode, const APInt &Imm, +unsigned X86TTI::getIntImmCost(unsigned Opcode, unsigned Idx, const APInt &Imm, Type *Ty) const { assert(Ty->isIntegerTy()); @@ -791,7 +794,15 @@ unsigned X86TTI::getIntImmCost(unsigned Opcode, const APInt &Imm, if (BitSize == 0) return ~0U; + unsigned ImmIdx = ~0U; switch (Opcode) { + default: return TCC_Free; + case Instruction::GetElementPtr: + if (Idx != 0) + return TCC_Free; + case Instruction::Store: + ImmIdx = 0; + break; case Instruction::Add: case Instruction::Sub: case Instruction::Mul: @@ -806,28 +817,31 @@ unsigned X86TTI::getIntImmCost(unsigned Opcode, const APInt &Imm, case Instruction::Or: case Instruction::Xor: case Instruction::ICmp: - if (Imm.getBitWidth() <= 64 && isInt<32>(Imm.getSExtValue())) - return TCC_Free; - else - return X86TTI::getIntImmCost(Imm, Ty); + ImmIdx = 1; + break; case Instruction::Trunc: case Instruction::ZExt: case Instruction::SExt: case Instruction::IntToPtr: case Instruction::PtrToInt: case Instruction::BitCast: + case Instruction::PHI: case Instruction::Call: case Instruction::Select: case Instruction::Ret: case Instruction::Load: - case Instruction::Store: - return X86TTI::getIntImmCost(Imm, Ty); + break; } - return TargetTransformInfo::getIntImmCost(Opcode, Imm, Ty); + + if ((Idx == ImmIdx) && + Imm.getBitWidth() <= 64 && isInt<32>(Imm.getSExtValue())) + return TCC_Free; + + return X86TTI::getIntImmCost(Imm, Ty); } -unsigned X86TTI::getIntImmCost(Intrinsic::ID IID, const APInt &Imm, - Type *Ty) const { +unsigned X86TTI::getIntImmCost(Intrinsic::ID IID, unsigned Idx, + const APInt &Imm, Type *Ty) const { assert(Ty->isIntegerTy()); unsigned BitSize = Ty->getPrimitiveSizeInBits(); @@ -835,21 +849,24 @@ unsigned X86TTI::getIntImmCost(Intrinsic::ID IID, const APInt &Imm, return ~0U; switch (IID) { - default: return TargetTransformInfo::getIntImmCost(IID, Imm, Ty); + default: return TCC_Free; case Intrinsic::sadd_with_overflow: case Intrinsic::uadd_with_overflow: case Intrinsic::ssub_with_overflow: case Intrinsic::usub_with_overflow: case Intrinsic::smul_with_overflow: case Intrinsic::umul_with_overflow: - if (Imm.getBitWidth() <= 64 && isInt<32>(Imm.getSExtValue())) + if ((Idx == 1) && Imm.getBitWidth() <= 64 && isInt<32>(Imm.getSExtValue())) return TCC_Free; else return X86TTI::getIntImmCost(Imm, Ty); case Intrinsic::experimental_stackmap: + if (Idx < 2) + return TCC_Free; case Intrinsic::experimental_patchpoint_void: case Intrinsic::experimental_patchpoint_i64: - if (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue())) + if ((Idx < 4 ) || + (Imm.getBitWidth() <= 64 && isInt<64>(Imm.getSExtValue()))) return TCC_Free; else return X86TTI::getIntImmCost(Imm, Ty); |