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author | Adam Nemet <anemet@apple.com> | 2014-07-09 18:22:33 +0000 |
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committer | Adam Nemet <anemet@apple.com> | 2014-07-09 18:22:33 +0000 |
commit | 2820a5b9e974456ace273fbfeea2747dca94c212 (patch) | |
tree | a48f09e226b02a1c99282fc4e218e5ae4222c736 /llvm/lib/Target/X86/X86TargetTransformInfo.cpp | |
parent | 1ce0c37bf058d493ab320c6bd8d60693aebe92c9 (diff) | |
download | bcm5719-llvm-2820a5b9e974456ace273fbfeea2747dca94c212.tar.gz bcm5719-llvm-2820a5b9e974456ace273fbfeea2747dca94c212.zip |
[X86] AVX512: Enable it in the Loop Vectorizer
This lets us experiment with 512-bit vectorization without passing
force-vector-width manually.
The code generated for a simple integer memset loop is properly vectorized.
Disassembly is still broken for it though :(.
llvm-svn: 212634
Diffstat (limited to 'llvm/lib/Target/X86/X86TargetTransformInfo.cpp')
-rw-r--r-- | llvm/lib/Target/X86/X86TargetTransformInfo.cpp | 6 |
1 files changed, 5 insertions, 1 deletions
diff --git a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp index be9caba506d..c961e2f5b2c 100644 --- a/llvm/lib/Target/X86/X86TargetTransformInfo.cpp +++ b/llvm/lib/Target/X86/X86TargetTransformInfo.cpp @@ -144,13 +144,17 @@ unsigned X86TTI::getNumberOfRegisters(bool Vector) const { if (Vector && !ST->hasSSE1()) return 0; - if (ST->is64Bit()) + if (ST->is64Bit()) { + if (Vector && ST->hasAVX512()) + return 32; return 16; + } return 8; } unsigned X86TTI::getRegisterBitWidth(bool Vector) const { if (Vector) { + if (ST->hasAVX512()) return 512; if (ST->hasAVX()) return 256; if (ST->hasSSE1()) return 128; return 0; |