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| author | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-07 18:25:19 +0000 |
|---|---|---|
| committer | Simon Pilgrim <llvm-dev@redking.me.uk> | 2018-05-07 18:25:19 +0000 |
| commit | e480ed0b9f3b86c77efbf84505baf92cd95554ed (patch) | |
| tree | 90e3a11643c674dab0691af76631a63b87ae0da8 /llvm/lib/Target/X86/X86SchedSkylakeClient.td | |
| parent | f64f345e1ba0ec613e78f1b709b95f74f67cc477 (diff) | |
| download | bcm5719-llvm-e480ed0b9f3b86c77efbf84505baf92cd95554ed.tar.gz bcm5719-llvm-e480ed0b9f3b86c77efbf84505baf92cd95554ed.zip | |
[X86][AVX2] Tag VPMOVSX/VPMOVZX ymm instructions as WriteShuffle256
These are more like cross-lane shuffles than regular shuffles - we already do this for AVX512 equivalents.
Differential Revision: https://reviews.llvm.org/D46229
llvm-svn: 331659
Diffstat (limited to 'llvm/lib/Target/X86/X86SchedSkylakeClient.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86SchedSkylakeClient.td | 21 |
1 files changed, 2 insertions, 19 deletions
diff --git a/llvm/lib/Target/X86/X86SchedSkylakeClient.td b/llvm/lib/Target/X86/X86SchedSkylakeClient.td index 9875ce32236..408b3ce3690 100644 --- a/llvm/lib/Target/X86/X86SchedSkylakeClient.td +++ b/llvm/lib/Target/X86/X86SchedSkylakeClient.td @@ -731,19 +731,7 @@ def: InstRW<[SKLWriteResGroup30], (instregex "(ADD|SUB|SUBR)_FPrST0", "(ADD|SUB|SUBR)_FrST0", "VPBROADCASTBrr", "VPBROADCASTWrr", - "(V?)PCMPGTQ(Y?)rr", - "VPMOVSXBDYrr", - "VPMOVSXBQYrr", - "VPMOVSXBWYrr", - "VPMOVSXDQYrr", - "VPMOVSXWDYrr", - "VPMOVSXWQYrr", - "VPMOVZXBDYrr", - "VPMOVZXBQYrr", - "VPMOVZXBWYrr", - "VPMOVZXDQYrr", - "VPMOVZXWDYrr", - "VPMOVZXWQYrr")>; + "(V?)PCMPGTQ(Y?)rr")>; def SKLWriteResGroup31 : SchedWriteRes<[SKLPort0,SKLPort5]> { let Latency = 3; @@ -1558,12 +1546,7 @@ def SKLWriteResGroup133 : SchedWriteRes<[SKLPort5,SKLPort23]> { } def: InstRW<[SKLWriteResGroup133], (instregex "(ADD|SUB|SUBR)_F(32|64)m", "ILD_F(16|32|64)m", - "VPCMPGTQYrm", - "VPMOVZXBDYrm", - "VPMOVZXBQYrm", - "VPMOVZXBWYrm", - "VPMOVZXDQYrm", - "VPMOVZXWQYrm")>; + "VPCMPGTQYrm")>; def SKLWriteResGroup134 : SchedWriteRes<[SKLPort01,SKLPort23]> { let Latency = 10; |
