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| author | Craig Topper <craig.topper@gmail.com> | 2014-01-14 07:41:20 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2014-01-14 07:41:20 +0000 |
| commit | ae11aed9d7b380ad3af49eefe7e0c0161dd294a6 (patch) | |
| tree | 8f232e02b13bb7cb789139f58861e26481d5838e /llvm/lib/Target/X86/X86InstrSystem.td | |
| parent | 47d5569de1047c96ad79f0fd48e79c864d7cf700 (diff) | |
| download | bcm5719-llvm-ae11aed9d7b380ad3af49eefe7e0c0161dd294a6.tar.gz bcm5719-llvm-ae11aed9d7b380ad3af49eefe7e0c0161dd294a6.zip | |
Separate the concept of 16-bit/32-bit operand size controlled by 0x66 prefix and the current mode from the concept of SSE instructions using 0x66 prefix as part of their encoding without being affected by the mode.
This should allow SSE instructions to be encoded correctly in 16-bit mode which r198586 probably broke.
llvm-svn: 199193
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrSystem.td')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrSystem.td | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/X86/X86InstrSystem.td b/llvm/lib/Target/X86/X86InstrSystem.td index a559909a723..8c557e72337 100644 --- a/llvm/lib/Target/X86/X86InstrSystem.td +++ b/llvm/lib/Target/X86/X86InstrSystem.td @@ -542,10 +542,10 @@ let Predicates = [HasFSGSBase, In64BitMode] in { //===----------------------------------------------------------------------===// // INVPCID Instruction def INVPCID32 : I<0x82, MRMSrcMem, (outs), (ins GR32:$src1, i128mem:$src2), - "invpcid\t{$src2, $src1|$src1, $src2}", []>, OpSize, T8, + "invpcid\t{$src2, $src1|$src1, $src2}", []>, T8PD, Requires<[Not64BitMode]>; def INVPCID64 : I<0x82, MRMSrcMem, (outs), (ins GR64:$src1, i128mem:$src2), - "invpcid\t{$src2, $src1|$src1, $src2}", []>, OpSize, T8, + "invpcid\t{$src2, $src1|$src1, $src2}", []>, T8PD, Requires<[In64BitMode]>; //===----------------------------------------------------------------------===// |
