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authorChris Lattner <sabre@nondot.org>2010-02-03 21:57:59 +0000
committerChris Lattner <sabre@nondot.org>2010-02-03 21:57:59 +0000
commit223084d3ac553a856fea488211048124b45e7df2 (patch)
tree3e4343bf0d2d7c03a891315fe85a8b959054ef0d /llvm/lib/Target/X86/X86InstrInfo.h
parent6794f9b9f6b5b1d50b2784c95ee847d0570e9b62 (diff)
downloadbcm5719-llvm-223084d3ac553a856fea488211048124b45e7df2.tar.gz
bcm5719-llvm-223084d3ac553a856fea488211048124b45e7df2.zip
enhance new encoder to support prefixes + RawFrm
instructions with no operands. It can now handle define void @test2() nounwind { ret void } llvm-svn: 95261
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.h')
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.h6
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.h b/llvm/lib/Target/X86/X86InstrInfo.h
index 4f35d0dbaa1..9dccfbdff57 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.h
+++ b/llvm/lib/Target/X86/X86InstrInfo.h
@@ -640,11 +640,11 @@ public:
// getBaseOpcodeFor - This function returns the "base" X86 opcode for the
// specified machine instruction.
//
- unsigned char getBaseOpcodeFor(const TargetInstrDesc *TID) const {
- return TID->TSFlags >> X86II::OpcodeShift;
+ static unsigned char getBaseOpcodeFor(const TargetInstrDesc &TID) {
+ return TID.TSFlags >> X86II::OpcodeShift;
}
unsigned char getBaseOpcodeFor(unsigned Opcode) const {
- return getBaseOpcodeFor(&get(Opcode));
+ return getBaseOpcodeFor(get(Opcode));
}
static bool isX86_64NonExtLowByteReg(unsigned reg) {
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