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authorSanjay Patel <spatel@rotateright.com>2015-07-09 22:48:54 +0000
committerSanjay Patel <spatel@rotateright.com>2015-07-09 22:48:54 +0000
commitea81edf351c110c97407bde489a43c48b8cc3a9c (patch)
tree0f2c1f3988f74b88d8f7ac4e592daef90bc42c54 /llvm/lib/Target/X86/X86InstrInfo.cpp
parent549820b66aa30c74216c5d8b884193e3b9a8cbd0 (diff)
downloadbcm5719-llvm-ea81edf351c110c97407bde489a43c48b8cc3a9c.tar.gz
bcm5719-llvm-ea81edf351c110c97407bde489a43c48b8cc3a9c.zip
[x86] enable machine combiner reassociations for scalar double-precision adds
llvm-svn: 241871
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp')
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp2
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 5484ae91855..fdfdac90033 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -6408,7 +6408,9 @@ static bool hasReassocSibling(const MachineInstr &Inst, bool &Commuted) {
// 2. Other math / logic operations (and, or)
static bool isAssociativeAndCommutative(unsigned Opcode) {
switch (Opcode) {
+ case X86::ADDSDrr:
case X86::ADDSSrr:
+ case X86::VADDSDrr:
case X86::VADDSSrr:
case X86::MULSSrr:
case X86::VMULSSrr:
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