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| author | Craig Topper <craig.topper@intel.com> | 2017-11-01 18:10:06 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-11-01 18:10:06 +0000 |
| commit | ca1aa83cbe22e5b3aa7345a6fd7d0e4d4b1f1d64 (patch) | |
| tree | 6f6e721f11d79808c898ac7c43493005625463c1 /llvm/lib/Target/X86/X86InstrInfo.cpp | |
| parent | 671526148c547c453d320075ec619f5519499de2 (diff) | |
| download | bcm5719-llvm-ca1aa83cbe22e5b3aa7345a6fd7d0e4d4b1f1d64.tar.gz bcm5719-llvm-ca1aa83cbe22e5b3aa7345a6fd7d0e4d4b1f1d64.zip | |
[X86] Prevent fast isel from folding loads into the instructions listed in hasPartialRegUpdate.
This patch moves the check for opt size and hasPartialRegUpdate into the lower level implementation of foldMemoryOperandImpl to catch the entry point that fast isel uses.
We're still folding undef register instructions in AVX that we should also probably disable, but that's a problem for another patch.
Unfortunately, this requires reordering a bunch of functions which is why the diff is so large. I can do the function reordering separately if we want.
Differential Revision: https://reviews.llvm.org/D39402
llvm-svn: 317112
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 7 |
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 276ceae7cdc..a2ec1f4f469 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -8389,6 +8389,11 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl( MI.getOpcode() == X86::PUSH64r)) return nullptr; + // Avoid partial register update stalls unless optimizing for size. + // TODO: we should block undef reg update as well. + if (!MF.getFunction()->optForSize() && hasPartialRegUpdate(MI.getOpcode())) + return nullptr; + unsigned NumOps = MI.getDesc().getNumOperands(); bool isTwoAddr = NumOps > 1 && MI.getDesc().getOperandConstraint(1, MCOI::TIED_TO) != -1; @@ -8554,6 +8559,7 @@ X86InstrInfo::foldMemoryOperandImpl(MachineFunction &MF, MachineInstr &MI, // Unless optimizing for size, don't fold to avoid partial // register update stalls + // TODO: we should block undef reg update as well. if (!MF.getFunction()->optForSize() && hasPartialRegUpdate(MI.getOpcode())) return nullptr; @@ -8752,6 +8758,7 @@ MachineInstr *X86InstrInfo::foldMemoryOperandImpl( if (NoFusing) return nullptr; // Avoid partial register update stalls unless optimizing for size. + // TODO: we should block undef reg update as well. if (!MF.getFunction()->optForSize() && hasPartialRegUpdate(MI.getOpcode())) return nullptr; |

