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| author | Craig Topper <craig.topper@intel.com> | 2018-07-18 07:31:32 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2018-07-18 07:31:32 +0000 |
| commit | 92ea7a7b4877f931770a2bf2c997db0d4bf8bf86 (patch) | |
| tree | 5a139120a83011a1760130f014f94cfaf7f16b03 /llvm/lib/Target/X86/X86InstrInfo.cpp | |
| parent | a2bbfa21ce952fd02bfb584e214b1397dc81f53e (diff) | |
| download | bcm5719-llvm-92ea7a7b4877f931770a2bf2c997db0d4bf8bf86.tar.gz bcm5719-llvm-92ea7a7b4877f931770a2bf2c997db0d4bf8bf86.zip | |
[X86] Enable commuting of VUNPCKHPD to VMOVLHPS to enable load folding by using VMOVLPS with a modified address.
This required an annoying amount of tablegen multiclass changes to make only VUNPCKHPDZ128rr commutable.
llvm-svn: 337357
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index dd1c658d34d..ee0a6e270a3 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -1692,14 +1692,22 @@ MachineInstr *X86InstrInfo::commuteInstructionImpl(MachineInstr &MI, bool NewMI, OpIdx1, OpIdx2); } case X86::MOVHLPSrr: - case X86::UNPCKHPDrr: { + case X86::UNPCKHPDrr: + case X86::VMOVHLPSrr: + case X86::VUNPCKHPDrr: + case X86::VMOVHLPSZrr: + case X86::VUNPCKHPDZ128rr: { assert(Subtarget.hasSSE2() && "Commuting MOVHLP/UNPCKHPD requires SSE2!"); unsigned Opc = MI.getOpcode(); switch (Opc) { - default: llvm_unreachable("Unreachable!"); - case X86::MOVHLPSrr: Opc = X86::UNPCKHPDrr; break; - case X86::UNPCKHPDrr: Opc = X86::MOVHLPSrr; break; + default: llvm_unreachable("Unreachable!"); + case X86::MOVHLPSrr: Opc = X86::UNPCKHPDrr; break; + case X86::UNPCKHPDrr: Opc = X86::MOVHLPSrr; break; + case X86::VMOVHLPSrr: Opc = X86::VUNPCKHPDrr; break; + case X86::VUNPCKHPDrr: Opc = X86::VMOVHLPSrr; break; + case X86::VMOVHLPSZrr: Opc = X86::VUNPCKHPDZ128rr; break; + case X86::VUNPCKHPDZ128rr: Opc = X86::VMOVHLPSZrr; break; } auto &WorkingMI = cloneIfNew(MI); WorkingMI.setDesc(get(Opc)); @@ -1990,6 +1998,10 @@ bool X86InstrInfo::findCommutedOpIndices(MachineInstr &MI, unsigned &SrcOpIdx1, return false; case X86::MOVHLPSrr: case X86::UNPCKHPDrr: + case X86::VMOVHLPSrr: + case X86::VUNPCKHPDrr: + case X86::VMOVHLPSZrr: + case X86::VUNPCKHPDZ128rr: if (Subtarget.hasSSE2()) return TargetInstrInfo::findCommutedOpIndices(MI, SrcOpIdx1, SrcOpIdx2); return false; |
