summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/X86/X86InstrInfo.cpp
diff options
context:
space:
mode:
authorSimon Pilgrim <llvm-dev@redking.me.uk>2016-08-09 09:32:34 +0000
committerSimon Pilgrim <llvm-dev@redking.me.uk>2016-08-09 09:32:34 +0000
commit54c32ddf558030dc571ba6809944a1240b663d11 (patch)
tree71b5c305a1701d6612625b22f4476983c696bd0c /llvm/lib/Target/X86/X86InstrInfo.cpp
parentadcd01f6cd1bafbab6628516911dc90933e08e80 (diff)
downloadbcm5719-llvm-54c32ddf558030dc571ba6809944a1240b663d11.tar.gz
bcm5719-llvm-54c32ddf558030dc571ba6809944a1240b663d11.zip
[X86][SSE] Fix memory folding of (v)roundsd / (v)roundss
We only had partial memory folding support for the intrinsic definitions, and (as noted on PR27481) was causing FR32/FR64/VR128 mismatch errors with the machine verifier. This patch adds missing memory folding support for both intrinsics and the ffloor/fnearbyint/fceil/frint/ftrunc patterns and in doing so fixes the failing machine verifier stack folding tests from PR27481. Differential Revision: https://reviews.llvm.org/D23276 llvm-svn: 278106
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp')
-rw-r--r--llvm/lib/Target/X86/X86InstrInfo.cpp8
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp
index 30c963c61ad..b8338bb146d 100644
--- a/llvm/lib/Target/X86/X86InstrInfo.cpp
+++ b/llvm/lib/Target/X86/X86InstrInfo.cpp
@@ -1116,6 +1116,8 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI)
{ X86::PXORrr, X86::PXORrm, TB_ALIGN_16 },
{ X86::ROUNDSDr, X86::ROUNDSDm, 0 },
{ X86::ROUNDSSr, X86::ROUNDSSm, 0 },
+ { X86::ROUNDSDr_Int, X86::ROUNDSDm_Int, 0 },
+ { X86::ROUNDSSr_Int, X86::ROUNDSSm_Int, 0 },
{ X86::SBB32rr, X86::SBB32rm, 0 },
{ X86::SBB64rr, X86::SBB64rm, 0 },
{ X86::SHUFPDrri, X86::SHUFPDrmi, TB_ALIGN_16 },
@@ -1412,6 +1414,8 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI)
{ X86::VPXORrr, X86::VPXORrm, 0 },
{ X86::VROUNDSDr, X86::VROUNDSDm, 0 },
{ X86::VROUNDSSr, X86::VROUNDSSm, 0 },
+ { X86::VROUNDSDr_Int, X86::VROUNDSDm_Int, 0 },
+ { X86::VROUNDSSr_Int, X86::VROUNDSSm_Int, 0 },
{ X86::VSHUFPDrri, X86::VSHUFPDrmi, 0 },
{ X86::VSHUFPSrri, X86::VSHUFPSrmi, 0 },
{ X86::VSUBPDrr, X86::VSUBPDrm, 0 },
@@ -6208,9 +6212,11 @@ static bool hasPartialRegUpdate(unsigned Opcode) {
case X86::ROUNDSDr:
case X86::ROUNDSDm:
case X86::ROUNDSDr_Int:
+ case X86::ROUNDSDm_Int:
case X86::ROUNDSSr:
case X86::ROUNDSSm:
case X86::ROUNDSSr_Int:
+ case X86::ROUNDSSm_Int:
case X86::RSQRTSSr:
case X86::RSQRTSSm:
case X86::RSQRTSSr_Int:
@@ -6289,9 +6295,11 @@ static bool hasUndefRegUpdate(unsigned Opcode) {
case X86::VROUNDSDr:
case X86::VROUNDSDm:
case X86::VROUNDSDr_Int:
+ case X86::VROUNDSDm_Int:
case X86::VROUNDSSr:
case X86::VROUNDSSm:
case X86::VROUNDSSr_Int:
+ case X86::VROUNDSSm_Int:
case X86::VRSQRTSSr:
case X86::VRSQRTSSr_Int:
case X86::VRSQRTSSm:
OpenPOWER on IntegriCloud