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| author | Bill Wendling <isanbard@gmail.com> | 2011-04-12 22:46:31 +0000 |
|---|---|---|
| committer | Bill Wendling <isanbard@gmail.com> | 2011-04-12 22:46:31 +0000 |
| commit | 47c24875a1d1ce1a4b09c45d87723c229a7af3c9 (patch) | |
| tree | 4200c20a52a48a9bd4aa5133eaa5fb43c4a552e6 /llvm/lib/Target/X86/X86InstrInfo.cpp | |
| parent | de9d58569ffca4c370346f3aed398db5827a813e (diff) | |
| download | bcm5719-llvm-47c24875a1d1ce1a4b09c45d87723c229a7af3c9.tar.gz bcm5719-llvm-47c24875a1d1ce1a4b09c45d87723c229a7af3c9.zip | |
Remove the unaligned load intrinsics in favor of using native unaligned loads.
Now that we have a first-class way to represent unaligned loads, the unaligned
load intrinsics are superfluous.
First part of <rdar://problem/8460511>.
llvm-svn: 129401
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 5 |
1 files changed, 0 insertions, 5 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index 21df57c9cda..85ab916d71d 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -916,7 +916,6 @@ X86InstrInfo::isReallyTriviallyReMaterializable(const MachineInstr *MI, case X86::MOVSDrm: case X86::MOVAPSrm: case X86::MOVUPSrm: - case X86::MOVUPSrm_Int: case X86::MOVAPDrm: case X86::MOVDQArm: case X86::MMX_MOVD64rm: @@ -2845,11 +2844,9 @@ X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, case X86::FsMOVAPDrm: case X86::MOVAPSrm: case X86::MOVUPSrm: - case X86::MOVUPSrm_Int: case X86::MOVAPDrm: case X86::MOVDQArm: case X86::MOVDQUrm: - case X86::MOVDQUrm_Int: break; } switch (Opc2) { @@ -2869,11 +2866,9 @@ X86InstrInfo::areLoadsFromSameBasePtr(SDNode *Load1, SDNode *Load2, case X86::FsMOVAPDrm: case X86::MOVAPSrm: case X86::MOVUPSrm: - case X86::MOVUPSrm_Int: case X86::MOVAPDrm: case X86::MOVDQArm: case X86::MOVDQUrm: - case X86::MOVDQUrm_Int: break; } |
