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| author | Craig Topper <craig.topper@gmail.com> | 2016-11-26 08:21:52 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@gmail.com> | 2016-11-26 08:21:52 +0000 |
| commit | 10d5eec1a1615dcd3a4156041ae5e5a709d8679e (patch) | |
| tree | 4c635b871be3173892313f2c015c7107ba4f2d9f /llvm/lib/Target/X86/X86InstrInfo.cpp | |
| parent | 97169ea5f9e421fd74f71076aef3f2df508e3815 (diff) | |
| download | bcm5719-llvm-10d5eec1a1615dcd3a4156041ae5e5a709d8679e.tar.gz bcm5719-llvm-10d5eec1a1615dcd3a4156041ae5e5a709d8679e.zip | |
[AVX-512] Add unmasked EVEX vpmovzx/sx instructions to load folding tables.
llvm-svn: 287975
Diffstat (limited to 'llvm/lib/Target/X86/X86InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86InstrInfo.cpp | 36 |
1 files changed, 36 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86InstrInfo.cpp b/llvm/lib/Target/X86/X86InstrInfo.cpp index ed2ed38f622..8300b4054fd 100644 --- a/llvm/lib/Target/X86/X86InstrInfo.cpp +++ b/llvm/lib/Target/X86/X86InstrInfo.cpp @@ -879,6 +879,18 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI) { X86::VMOVUPSZrr, X86::VMOVUPSZrm, 0 }, { X86::VPABSDZrr, X86::VPABSDZrm, 0 }, { X86::VPABSQZrr, X86::VPABSQZrm, 0 }, + { X86::VPMOVSXBDZrr, X86::VPMOVSXBDZrm, 0 }, + { X86::VPMOVSXBQZrr, X86::VPMOVSXBQZrm, 0 }, + { X86::VPMOVSXBWZrr, X86::VPMOVSXBWZrm, 0 }, + { X86::VPMOVSXDQZrr, X86::VPMOVSXDQZrm, 0 }, + { X86::VPMOVSXWDZrr, X86::VPMOVSXWDZrm, 0 }, + { X86::VPMOVSXWQZrr, X86::VPMOVSXWQZrm, 0 }, + { X86::VPMOVZXBDZrr, X86::VPMOVZXBDZrm, 0 }, + { X86::VPMOVZXBQZrr, X86::VPMOVZXBQZrm, 0 }, + { X86::VPMOVZXBWZrr, X86::VPMOVZXBWZrm, 0 }, + { X86::VPMOVZXDQZrr, X86::VPMOVZXDQZrm, 0 }, + { X86::VPMOVZXWDZrr, X86::VPMOVZXWDZrm, 0 }, + { X86::VPMOVZXWQZrr, X86::VPMOVZXWQZrm, 0 }, // AVX-512 foldable instructions (256-bit versions) { X86::VBROADCASTSSZ256r, X86::VBROADCASTSSZ256m, TB_NO_REVERSE }, @@ -895,6 +907,18 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI) { X86::VMOVDQU64Z256rr, X86::VMOVDQU64Z256rm, 0 }, { X86::VMOVUPDZ256rr, X86::VMOVUPDZ256rm, 0 }, { X86::VMOVUPSZ256rr, X86::VMOVUPSZ256rm, 0 }, + { X86::VPMOVSXBDZ256rr, X86::VPMOVSXBDZ256rm, 0 }, + { X86::VPMOVSXBQZ256rr, X86::VPMOVSXBQZ256rm, 0 }, + { X86::VPMOVSXBWZ256rr, X86::VPMOVSXBWZ256rm, 0 }, + { X86::VPMOVSXDQZ256rr, X86::VPMOVSXDQZ256rm, 0 }, + { X86::VPMOVSXWDZ256rr, X86::VPMOVSXWDZ256rm, 0 }, + { X86::VPMOVSXWQZ256rr, X86::VPMOVSXWQZ256rm, 0 }, + { X86::VPMOVZXBDZ256rr, X86::VPMOVZXBDZ256rm, 0 }, + { X86::VPMOVZXBQZ256rr, X86::VPMOVZXBQZ256rm, 0 }, + { X86::VPMOVZXBWZ256rr, X86::VPMOVZXBWZ256rm, 0 }, + { X86::VPMOVZXDQZ256rr, X86::VPMOVZXDQZ256rm, 0 }, + { X86::VPMOVZXWDZ256rr, X86::VPMOVZXWDZ256rm, 0 }, + { X86::VPMOVZXWQZ256rr, X86::VPMOVZXWQZ256rm, 0 }, // AVX-512 foldable instructions (128-bit versions) { X86::VBROADCASTSSZ128r, X86::VBROADCASTSSZ128m, TB_NO_REVERSE }, @@ -909,6 +933,18 @@ X86InstrInfo::X86InstrInfo(X86Subtarget &STI) { X86::VMOVDQU64Z128rr, X86::VMOVDQU64Z128rm, 0 }, { X86::VMOVUPDZ128rr, X86::VMOVUPDZ128rm, 0 }, { X86::VMOVUPSZ128rr, X86::VMOVUPSZ128rm, 0 }, + { X86::VPMOVSXBDZ128rr, X86::VPMOVSXBDZ128rm, 0 }, + { X86::VPMOVSXBQZ128rr, X86::VPMOVSXBQZ128rm, 0 }, + { X86::VPMOVSXBWZ128rr, X86::VPMOVSXBWZ128rm, 0 }, + { X86::VPMOVSXDQZ128rr, X86::VPMOVSXDQZ128rm, 0 }, + { X86::VPMOVSXWDZ128rr, X86::VPMOVSXWDZ128rm, 0 }, + { X86::VPMOVSXWQZ128rr, X86::VPMOVSXWQZ128rm, 0 }, + { X86::VPMOVZXBDZ128rr, X86::VPMOVZXBDZ128rm, 0 }, + { X86::VPMOVZXBQZ128rr, X86::VPMOVZXBQZ128rm, 0 }, + { X86::VPMOVZXBWZ128rr, X86::VPMOVZXBWZ128rm, 0 }, + { X86::VPMOVZXDQZ128rr, X86::VPMOVZXDQZ128rm, 0 }, + { X86::VPMOVZXWDZ128rr, X86::VPMOVZXWDZ128rm, 0 }, + { X86::VPMOVZXWQZ128rr, X86::VPMOVZXWQZ128rm, 0 }, // F16C foldable instructions { X86::VCVTPH2PSrr, X86::VCVTPH2PSrm, 0 }, |
