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authorQuentin Colombet <qcolombet@apple.com>2015-03-12 19:34:12 +0000
committerQuentin Colombet <qcolombet@apple.com>2015-03-12 19:34:12 +0000
commitf59b2d034cd7da4f9de6c56fea311ee0af849598 (patch)
tree5f1596a9014b4591b8ca04d1b92fcacc0d8ada9a /llvm/lib/Target/X86/X86ISelLowering.cpp
parent9a0263aad7b88d2609b18dc150fddfa124abbe8b (diff)
downloadbcm5719-llvm-f59b2d034cd7da4f9de6c56fea311ee0af849598.tar.gz
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[X86] Fix a regression introduced by r223641.
The permps and permd instructions have their operands swapped compared to the intrinsic definition. Therefore, they do not fall into the INTR_TYPE_2OP category. I did not create a new category for those two, as they are the only one AFAICT in that case. <rdar://problem/20108262> llvm-svn: 232085
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
-rw-r--r--llvm/lib/Target/X86/X86ISelLowering.cpp7
1 files changed, 7 insertions, 0 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp
index 366e4b9e073..0533afc59f6 100644
--- a/llvm/lib/Target/X86/X86ISelLowering.cpp
+++ b/llvm/lib/Target/X86/X86ISelLowering.cpp
@@ -14711,6 +14711,13 @@ static SDValue LowerINTRINSIC_WO_CHAIN(SDValue Op, const X86Subtarget *Subtarget
switch (IntNo) {
default: return SDValue(); // Don't custom lower most intrinsics.
+ case Intrinsic::x86_avx2_permd:
+ case Intrinsic::x86_avx2_permps:
+ // Operands intentionally swapped. Mask is last operand to intrinsic,
+ // but second operand for node/instruction.
+ return DAG.getNode(X86ISD::VPERMV, dl, Op.getValueType(),
+ Op.getOperand(2), Op.getOperand(1));
+
case Intrinsic::x86_avx512_mask_valign_q_512:
case Intrinsic::x86_avx512_mask_valign_d_512:
// Vector source operands are swapped.
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