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| author | Craig Topper <craig.topper@intel.com> | 2017-12-17 01:35:48 +0000 |
|---|---|---|
| committer | Craig Topper <craig.topper@intel.com> | 2017-12-17 01:35:48 +0000 |
| commit | ee1e71e576384d0481ba05e90453ba8209bdd6f5 (patch) | |
| tree | 641172ed09f121b4798070dd8035a59b4b4f908e /llvm/lib/Target/X86/X86ISelLowering.cpp | |
| parent | c0c2d19e083fd21dcc4313adb2daa0b669400658 (diff) | |
| download | bcm5719-llvm-ee1e71e576384d0481ba05e90453ba8209bdd6f5.tar.gz bcm5719-llvm-ee1e71e576384d0481ba05e90453ba8209bdd6f5.zip | |
[X86] Use extract_vector_elt instead of X86ISD::VEXTRACT for isel of vXi1 extractions.
llvm-svn: 320937
Diffstat (limited to 'llvm/lib/Target/X86/X86ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/X86/X86ISelLowering.cpp | 17 |
1 files changed, 10 insertions, 7 deletions
diff --git a/llvm/lib/Target/X86/X86ISelLowering.cpp b/llvm/lib/Target/X86/X86ISelLowering.cpp index 7135be37ffc..64121cbb13c 100644 --- a/llvm/lib/Target/X86/X86ISelLowering.cpp +++ b/llvm/lib/Target/X86/X86ISelLowering.cpp @@ -14575,6 +14575,12 @@ static SDValue ExtractBitFromMaskVector(SDValue Op, SelectionDAG &DAG, return DAG.getAnyExtOrTrunc(Extract, dl, EltVT); } + unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); + + // Extracts from element 0 are always allowed. + if (IdxVal == 0) + return Op; + // If the kshift instructions of the correct width aren't natively supported // then we need to promote the vector to the native size to get the correct // zeroing behavior. @@ -14587,12 +14593,10 @@ static SDValue ExtractBitFromMaskVector(SDValue Op, SelectionDAG &DAG, DAG.getIntPtrConstant(0, dl)); } - // Use kshiftlw/rw instruction. - unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue(); - if (IdxVal != 0) - Vec = DAG.getNode(X86ISD::KSHIFTR, dl, VecVT, Vec, - DAG.getConstant(IdxVal, dl, MVT::i8)); - return DAG.getNode(X86ISD::VEXTRACT, dl, Op.getSimpleValueType(), Vec, + // Use kshiftr instruction to move to the lower element. + Vec = DAG.getNode(X86ISD::KSHIFTR, dl, VecVT, Vec, + DAG.getConstant(IdxVal, dl, MVT::i8)); + return DAG.getNode(ISD::EXTRACT_VECTOR_ELT, dl, MVT::i32, Vec, DAG.getIntPtrConstant(0, dl)); } @@ -25217,7 +25221,6 @@ const char *X86TargetLowering::getTargetNodeName(unsigned Opcode) const { case X86ISD::VBROADCAST: return "X86ISD::VBROADCAST"; case X86ISD::VBROADCASTM: return "X86ISD::VBROADCASTM"; case X86ISD::SUBV_BROADCAST: return "X86ISD::SUBV_BROADCAST"; - case X86ISD::VEXTRACT: return "X86ISD::VEXTRACT"; case X86ISD::VPERMILPV: return "X86ISD::VPERMILPV"; case X86ISD::VPERMILPI: return "X86ISD::VPERMILPI"; case X86ISD::VPERM2X128: return "X86ISD::VPERM2X128"; |

